linux/Documentation/translations
Linus Torvalds 827751b699 RISC-V updates for v7.3-rc3
- Revert a bad fix, likely LLM-generated, in the pointer masking code
   that confused the RISC-V hardware pointer masking implementation
   with the Linux kernel tagged address feature
 
 - Fix unexpected faults caused by kprobe instruction slot writes when
   !CONFIG_STRICT_MODULE_RWX
 
 - Fix unexpected faults on minimal configurations during runtime code
   patching on !CONFIG_STRICT_MODULE_RWX systems
 
 - Fix a misplaced variable clear causing incorrect reuse of previous
   values in the RISC-V hardware feature probing code
 
 - Fix two bugs in the PMU SBI perf code on rv32: use BIT_ULL rather
   than BIT on 64-bit masks; and use a bitmap rather than an unsigned
   long on a quantity that can exceed 32 bits
 
 And a few miscellaneous cleanups:
 
 - Avoid a potential dereference-before-NULL-pointer-check bug in the
   PMU SBI perf driver
 
 - Simplify the rv32 bug table code by using
   CONFIG_GENERIC_BUG_RELATIVE_POINTERS (following x86 and PPC)
 
 - Report the RISC-V standard ISA extensions Z[v]fhmin when support is
   claimed for the superset RISC-V standard ISA extensions Z[v]fh; and
   simplify our FPU test code to only check for the presence of the D
   extension
 
 - Use an existing kernel string helper in place of some open-coded
   code in kernel/usercfi.c
 
 - Fix some yamllint issues in the RISC-V DT bindings for CPUs
 
 - Convert one use of __ASSEMBLY__ to __ASSEMBLER__ that snuck into the
   RISC-V CFI selftest code
 
 - Update the translation for the simplified Chinese translation of the
   RISC-V kernel patch acceptance policy
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Merge tag 'riscv-for-linus-7.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Paul Walmsley:
 "From a RISC-V point of view, there's one notable fix here, reverting
  an earlier bogus fix to the pointer masking code. Fortunately the
  practical impact appears to be small.

   - Revert a bad fix, likely LLM-generated, in the pointer masking code
     that confused the RISC-V hardware pointer masking implementation
     with the Linux kernel tagged address feature

   - Fix unexpected faults caused by kprobe instruction slot writes when
     !CONFIG_STRICT_MODULE_RWX

   - Fix unexpected faults on minimal configurations during runtime code
     patching on !CONFIG_STRICT_MODULE_RWX systems

   - Fix a misplaced variable clear causing incorrect reuse of previous
     values in the RISC-V hardware feature probing code

   - Fix two bugs in the PMU SBI perf code on rv32: use BIT_ULL rather
     than BIT on 64-bit masks; and use a bitmap rather than an unsigned
     long on a quantity that can exceed 32 bits

  And a few miscellaneous cleanups:

   - Avoid a potential dereference-before-NULL-pointer-check bug in the
     PMU SBI perf driver

   - Use CONFIG_GENERIC_BUG_RELATIVE_POINTERS to simplify the rv32 bug
     table code (like x86 and PPC)

   - Report the RISC-V standard ISA extensions Z[v]fhmin when support is
     claimed for the superset RISC-V standard ISA extensions Z[v]fh; and
     simplify our FPU test code to only check for the presence of the D
     extension

   - Use an existing kernel string helper in place of some open-coded
     code in kernel/usercfi.c

   - Fix some yamllint issues in the RISC-V DT bindings for CPUs

   - Convert one use of __ASSEMBLY__ to __ASSEMBLER__ that snuck into
     the RISC-V CFI selftest code

   - Update the translation for the simplified Chinese translation of
     the RISC-V kernel patch acceptance policy"

* tag 'riscv-for-linus-7.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: skip software algning code for HAVE_EFFICIENT_UNALIGNED_ACCESS
  kselftest/riscv: Replace __ASSEMBLY__ with __ASSEMBLER__
  docs/zh_CN: Update arch/riscv/patch-acceptance.rst translation
  dt-bindings: riscv: cpus: Fix yamllint style issues
  riscv: hwprobe: simplify has_fpu() to check D extension only
  perf: RISC-V: check cpu_hw_evt before dereference in overflow IRQ
  riscv: report Zfhmin/Zvfhmin when Zfh/Zvfh are present
  perf: RISC-V: store available counter mask as bitmap
  perf: RISC-V: use BIT_ULL for u64 overflow masks
  riscv: bug: Make RV32 use GENERIC_BUG_RELATIVE_POINTERS
  riscv: hwprobe: initialize pair->value in hwprobe_one_pair()
  riscv: use string helper in setup_global_riscv_enable()
  Revert "riscv: Reset pmm when PR_TAGGED_ADDR_ENABLE is not set"
  riscv: patch: skip fixmap mapping when kernel text is already writable
  riscv: mm: make EXECMEM_KPROBES writable without CONFIG_STRICT_MODULE_RWX
2026-09-11 13:15:13 -07:00
..
it_IT doc:it_IT: align Italian documentation in process 2026-08-24 11:03:46 -06:00
ja_JP docs/ja_JP: translate submitting-patches.rst (tag usage) 2026-08-24 10:57:59 -06:00
ko_KR Docs/translations/ko_KR: remove memory-barriers 2026-01-06 14:53:51 -07:00
pt_BR docs: pt_BR: Reorganize process/index.rst to follow english structure 2026-08-13 09:22:21 -06:00
sp_SP MAINTAINERS: update ndesaulniers 2026-07-06 15:49:29 -07:00
zh_CN RISC-V updates for v7.3-rc3 2026-09-11 13:15:13 -07:00
zh_TW docs/zh_TW: replace 接口 with 介面 in stable-api-nonsense.rst 2026-07-17 20:24:08 +08:00
index.rst docs: pt_BR: Add initial Portuguese translation 2026-02-23 14:16:07 -07:00