Due to reorganization of tracehooks upstream, topology.h does not exist
anymore. Remove the associated header.
Change-Id: Ib4c7e630dfbefd6965524f91101784a57327af39
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
struct task_struct does not contain a member to store task cpu
information anymore. Instead, use task_thread_info() to obtain that
information.
Change-Id: I8fc9ef4ebf11f6fccd6ecbe68d768ac48d2928c5
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
struct kobj_type does not contain the default_attrs member anymore.
Instead create attribute group using the ATTRIBUTE_GROUPS macro and
assign to kobj_type object.
Change-Id: I5d21c816edb13b5020e064f55c3e495002897d4a
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
Remove WALT_NONCRITICAL as it hasn't been useful.
Change-Id: Ia28005c5f980fcb598226b3aae4b21efeac1b526
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
Pause will not be invoked through core control until after
walt has been initialized. However, the walt_pause apis are
made available to other vendor modules, and if those modules
attempt to invoke pause prior to walt being initialized, an
invalid reference to walt_drain_thread will be made.
Prevent the walt_pause and walt_resume apis from being used
until after walt has been properly initialized, walt_halt_init
has been called, and walt_drain_thread properly created.
Change-Id: Iadd764ebfb7402529b49de6ef121d23dfcdc5649
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
Capture the fmax_capacity of the CPU reduced under cpufreq constraints
in the related tracepoint.
Change-Id: I3dc5c54a7a5850b9c5f4df8a40daea593fff023b
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
We have a legacy sysfs interface to change the USB operating mode. Since
usb_role callbacks are available for user space and UCSI, there is
really no need for mode sysfs interface. For the sake of not breaking
any existing use cases, keep the mode interface but re-use the usb_role
callbacks. The usb-role-switch is an optional property, so refactor
the role switch ops so that they can be called even when this property
is not available but mode sysfs interface can be made available. Note that
there is no visible change to the user space.
Change-Id: I3f8b03b420429375af8d29d7b2339b490980dee0
Signed-off-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com>
If the same role as the current role is requested, bail out early.
Change-Id: I42dc3f6759800926a4a98254a2ff30f932394704
Signed-off-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com>
If USB controller is configured to work in a specific mode, reject
any compatible role/mode request. For example, if device mode is
only allowed, switching to host mode/role is not allowed. The current
code allows this and it results in accessing invalid dwc host structures.
Change-Id: I5e4d905c8240ad228f48b40fe36298029d8770e1
Signed-off-by: Pavankumar Kondeti <quic_pkondeti@quicinc.com>
Funnel devices are now capable of supporting multiple-inputs and
multiple-outputs configuration with in built hardware filtering
for TPDM devices. Add software support to this function. Output
ports is selected according to the source of the trace path.
Change-Id: I491293e0b1948f3747d34eb79e7845617ace4244
Signed-off-by: Tingwei Zhang <tingwei@codeaurora.org>
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>
Signed-off-by: Tao Zhang <taozha@codeaurora.org>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Remove region from local minidump table when failed to register new
region with RM call.
Change-Id: I85bbf62e90cd423be7d3475a5f6526062b22c8c9
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
If user register minidump region with same name, return -EEXIST error
code.
Change-Id: I612a7a4f77fdd80d3b677b2b2b4e4d1221c3395f
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
Enable QDSS configs to support STM/TPDM/Remote ETM/CTI functions.
Change-Id: I297b0820794849d3dc27af30b646780f4370d1d7
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Add the coresight qmi head file since the remote etm need it
support.
Change-Id: I282abfab76be5149dca2496bb9583951f760f17e
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
Add msleep_interruptible to list of symbols.
Change-Id: I348f22cca19c1086c04068ba1ea539b18705d84b
Signed-off-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Add ioctl support by which userspace can know the various stats.
Change-Id: I916232f7eeb0efd7ca5a8d99afff547fdb9ad594
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
migrate_disable is called to prevent moving a task to a different
cpu. In the process it will update the task's cpus_ptr to a
temporary mask to restrict the task to run only on the current
cpu. It has only one cpu set in this new mask. migrate_disable
must always be paired with a migrate_enable call.
When migrate_enable is called it will attempt to manipulate the
allowed ptrs mask just prior to actually enabling migration on
a task. This means __set_cpus_allowed_ptr is called. This calls
a tracehook:
migrate_enable
__set_cpus_allowed_ptr
__set_cpus_allowed_ptr_locked
trace_android_rvh_set_cpus_allowed_ptr_locked
android_rvh_set_cpus_allowed_ptr_locked
The purpose of handling this hook in walt, is to prevent the
assignment of a task to a halted cpu. When migrate_enable
restores the affinity to p->cpus_mask and p->cpus_mask consists
of a single cpu and that single cpu is halted, WALT will cause
__set_cpus_allowed_ptr to reject and return early. IOW
p->cpus_ptr is not set to p->cpus_mask.
If the p->cpus_ptr is not restored to point to the p->cpus_mask,
a subsequent migrate_disable/migrate_enable can happen, and
is allowed to happen with the runque lock taken. Since the
p->cpus_ptr is not pointing to the p->cpus_mask, migrate_enable
will incorrectly call __set_cpus_allowed_ptr. This in turn
will take the runque lock again resulting in a spinlock
recursion.
Address this by updating the hook code, checking the
migrate_disabled flag for the task, and allowing the existing
cpu to be used even if that cpu is halted. To achieve this
utilize a different hook that is present in the code already:
trace_android_rvh_set_cpus_allowed_by_task().
Change-Id: I42204332d708c6bc96f5de52eb9739d17cfdc0a3
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
TASK_BOOST_STRICT_MAX task can cause performance influence if it haven't
running on prime core, so do this for these tasks have high chance for
running on prime core.
Change-Id: I249dbe1c201934ea3c4610e93b1b71b24fb20d80
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Certain frequencies in min-cap cpus draw excessive power and
are more costly to the device's performance than indicated by
the energy model.
For silver frequencies above a threshold, inflate the cost by
a percentage to create a steep power curve, favoring golds at
lower frequencies. For example, to raise the cost for
frequencies above 1.6GHz by 3x:
echo 300 > /proc/sys/walt/sched_em_inflate_pct
echo 220 > /proc/sys/walt/sched_em_inflate_thres
Change-Id: Ia10a818ab2f217ffa3039667f52566d9894e5047
Signed-off-by: Shaleen Agrawal <quic_shalagra@quicinc.com>
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
"trace_binder_transaction_received" vendor hook is used to clear binder low
latency MVP priority, but for some usecase it is observed that usespace
application is initiating read ioctl quickly and as part of ioctl handling
binder driver initiates transaction received vendor hook and binder low
latency MVP priority is cleared for the binder thread.
Handle above condition by allowing binder thread to maintain and run with
MVP priority for it's allocated MVP timeslice.
The Low latency flag of the task is reset only when the binder transactions
is initiated again on the same thread and task initiating the transaction
doesn't comply with the low latency criterion.
Change-Id: Ie068adc64796432b7d41b0256a25a04caac518b1
Signed-off-by: Ashay Jaiswal <quic_ashayj@quicinc.com>
Core control takes a numeric input for the not_preferred field
to identify which cpus can be paused. 1 means can pause, 0 means
the cpu cannot pause.
The output is in order of the number of the cpu. For example
# cat /sys/devices/system/cpu/cpu3/core_ctl/not_preferred
1 0 1 0
This means that cpu 3 and cpu 5 are not_preferred and can be
paused.
Change-Id: Ia4b982352bba7e463d59579ece13ccfcb09b0baf
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
The current change protects only binder transactions
targeted towards an RT process. This change attempts to
consider all binder transaction interacting with an RT task.
Change-Id: I35cbb695f6709170afa075b1b50d009b17b1b508
Signed-off-by: Kishore Sri venkata Ganesh Bolisetty <quic_bsrivenk@quicinc.com>
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
Add kernel-space adaptive_low_freq and adaptive_high_freq to the
waltgov cpufreq policies, such that kernel space code or vendor
kernel space code can manipulate these values directly.
Set the actual in-use adaptive freq values to the max of the
user space value and the kernel space value.
Change-Id: I59deca1cd60bcd8bd63170e6e1bced63456b41d6
Signed-off-by: Stephen Dickey <quic_dickey@quicinc.com>
The current code identifies the first 32bit cpu as the packing cpu when
the load conditions are met. However, it skips checking if that 32bit
cpu is actually halted. In case it were halted, the
select_task_rq()->is_cpu_allowed() fails, causing the task to run on a
fallback cpu which invariably ends up being a silver cpu.
Fix this by finding the first unhalted cpu for packing. If its a 32bit
task further find a 32bit supporting cpu.
Either case always ensure that an unhalted cpu is used for packing.
Change-Id: I459c70fe3793a26c4b06bb80f8660003b1875c85
Signed-off-by: Abhijeet Dharmapurikar <quic_adharmap@quicinc.com>
This in addition to other criteria already present in the code.
Change-Id: Ief3a21eb159bed8eb724427c0acca327a3cbb272
Signed-off-by: Abhijeet Dharmapurikar <quic_adharmap@quicinc.com>
Previously, frequencies would jump to fmax when walt rotation was
enabled. This was done through the early detection path. But, as a
consequence of early detection boost optimizations, frequencies
regressed under walt rotation.
Change-Id: I40f91ba873a9cc179fcfb23291dc4839e857428a
Signed-off-by: Shaleen Agrawal <quic_shalagra@quicinc.com>
