Commit Graph

1233498 Commits

Author SHA1 Message Date
John Clark
aed6514c4e arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
Both rk806_dvs1_null and rk806_dvs2_null duplicate gpio_pwrctrl2 and
gpio_pwrctrl1 is not set. This patch sets gpio_pwrctrl1.

Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231225222859.17153-2-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29 23:01:27 +01:00
John Clark
7738f55117 arm64: dts: rockchip: support poweroff on the rock-5b
Allow the rock-5b to poweroff its pmic. When issuing a "shutdown -h now"
on the rock-5b it reboots instead. Defining 'system-power-controller'
allows the rk806 to power down.

Commit c699fbfdfd ("arm64: dts: rockchip: Support poweroff on
NanoPC-T6") similarly resolves this issue for the nanopc-t6.

Signed-off-by: John Clark <inindev@gmail.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231225222859.17153-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29 23:01:27 +01:00
Jimmy Hon
e9126f9d3c arm64: dts: rockchip: Support poweroff on Orange Pi 5
The RK806 on the Orange Pi 5 can be used to power on/off the whole board.
Mark it as the system power controller.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20231227203211.1047-1-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29 22:59:58 +01:00
John Clark
9e1faff1cb arm64: dts: rockchip: nanopc-t6 sdmmc beautification
drop max-frequency = <200000000> as it is already defined in rk3588s.dtsi
order no-sdio & no-mmc properties while we are here

Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231228173011.2863-1-inindev@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-29 22:50:58 +01:00
Sam Edwards
44de8996ed arm64: dts: rockchip: Fix rk3588 USB power-domain clocks
The QoS blocks saved/restored when toggling the PD_USB power domain are
clocked by ACLK_USB. Attempting to access these memory regions without
that clock running will result in an indefinite CPU stall.

The PD_USB node wasn't specifying this clock dependency, resulting in
hangs when trying to toggle the power domain (either on or off), unless
we get "lucky" and have ACLK_USB running for another reason at the time.
This "luck" can result from the bootloader leaving USB powered/clocked,
and if no built-in driver wants USB, Linux will disable the unused
PD+CLK on boot when {pd,clk}_ignore_unused aren't given. This can also
be unlucky because the two cleanup tasks run in parallel and race: if
the CLK is disabled first, the PD deactivation stalls the boot. In any
case, the PD cannot then be reenabled (if e.g. the driver loads later)
once the clock has been stopped.

Fix this by specifying a dependency on ACLK_USB, instead of only
ACLK_USB_ROOT. The child-parent relationship means the former implies
the latter anyway.

Fixes: c9211fa260 ("arm64: dts: rockchip: Add base DT for rk3588 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Link: https://lore.kernel.org/r/20231216021019.1543811-1-CFSworks@gmail.com
[changed to only include the missing clock, not dropping the root-clocks]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:32:53 +01:00
Tianling Shen
fc5a80a432 arm64: dts: rockchip: configure eth pad driver strength for orangepi r1 plus lts
The default strength is not enough to provide stable connection
under 3.3v LDO voltage.

Fixes: 387b3bbac5 ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
Cc: stable@vger.kernel.org # 6.6+
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20231216040723.17864-1-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:24:01 +01:00
Hugh Cole-Baker
c699fbfdfd arm64: dts: rockchip: Support poweroff on NanoPC-T6
The RK806 on the NanoPC-T6 can be used to power on/off the whole board.
Mark it as the system power controller.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:23:57 +01:00
Trevor Woerner
085021cc82 arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names cleanup
Perform the following cleanups on a previous patch:
- indent lines after "gpio-line-names"
- fix D0-D8 -> D0-D7
- sort phandle references

Fixes: c45de75d7a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s")
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:18 +01:00
Andy Yan
791c154c39 arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB
Cool Pi CM5 EVB works as a mother board connect with CM5.

CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S

CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20231212124407.1897604-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:02 +01:00
Andy Yan
e2637a4d67 dt-bindings: arm: rockchip: Add Cool Pi CM5
Add Cool Pi CM5, a board powered by RK3588

CM5 EVB works with a mother board connect with
CM5

Signed-off-by: Andy Yan <andyshrk@163.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231212124340.1897502-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:02 +01:00
Andy Yan
3f5d336d64 arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B
CoolPi 4B is a rk3588s based SBC.
Specification:
- Rockchip RK3588S
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- Gigabit ethernet drived by PCIE with RTL8111HS
- HDMI Type D out
- Mini DP out
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- WIFI/BT module AIC8800
- 40 pin header

Signed-off-by: Andy Yan <andyshrk@163.com>

arm64: dts: rockchip: Add support for rk3588s based board Cool Pi 4B
Link: https://lore.kernel.org/r/20231212124253.1897438-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:02 +01:00
Andy Yan
c0a38606e6 dt-bindings: arm: rockchip: Add Cool Pi 4B
Add Cool Pi 4B, a SBC powered by RK3588S

Signed-off-by: Andy Yan <andyshrk@163.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231212124237.1897378-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:02 +01:00
Andy Yan
a6c06d4469 dt-bindings: vendor-prefixes: Add Cool Pi
Add vendor prefix for Cool Pi(https://cool-pi.com/)

Signed-off-by: Andy Yan <andyshrk@163.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231212124223.1897314-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:01 +01:00
Trevor Woerner
b34d5026b6 arm64: dts: rockchip: add gpio-line-names to rk3328-rock-pi-e
Add names to the pins of the general-purpose expansion header as given
in the Radxa GPIO page[1] following the conventions in the kernel
documentation[2] to make it easier for users to correlate the pins with
functions when using utilities such as 'gpioinfo'.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231213160556.14424-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:03:42 +01:00
Vahe Grigoryan
4a8cd5cb58 arm64: dts: rockchip: make use gpio-keys for buttons on puma-haikou
Haikou is an evaluation and development platform for System on
Modules (SOMs).

Haikou devkit exposes multiple buttons so let's register them as
such so that the input subsystem can generate events when pressed or
switched.

Signed-off-by: Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com>
Link: https://lore.kernel.org/r/20231214122801.3144180-3-vahe.grigoryan@theobroma-systems.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15 21:17:49 +01:00
Vahe Grigoryan
39d9556623 arm64: dts: rockchip: expose BIOS Disable feedback pin on rk3399-puma
The Puma SoM allows to select in hardware directly which storage
medium to try for loading the bootloader, either SPI-NOR followed
by eMMC followed by SD card, or SD card only.

This signal is exposed on the Q7 connector and allows carrierboards
to control it however they want.

This feedback pin allows to know in which state the SoM currently
is and provided the current state isn't modified until next reboot,
know from which storage medium the bootloader could be loaded from
next time.

Signed-off-by: Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com>
Link: https://lore.kernel.org/r/20231214122801.3144180-2-vahe.grigoryan@theobroma-systems.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15 21:17:36 +01:00
Vahe Grigoryan
9050aefab1 arm64: dts: rockchip: fix misleading comment in rk3399-puma-haikou.dts
Haikou is an evaluation and development platform for System on
Modules (SOMs).

The GPIO0_B1 is routed to the Wake button instead of BIOS_DISABLE,
update the comment to reflect that.

Signed-off-by: Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com>
Link: https://lore.kernel.org/r/20231214122801.3144180-1-vahe.grigoryan@theobroma-systems.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15 21:17:36 +01:00
Andy Yan
d895dbef3f arm64: dts: rockchip: Add vop on rk3588
Add vop dt node for rk3588.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20231211120004.1785616-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-15 18:07:17 +01:00
Andy Yan
1a648f8b79 dt-bindings: soc: rockchip: add rk3588 vop/vo syscon
Add VOP and VO GRF syscon compatibles for RK3588

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231211115836.1785248-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-13 14:00:36 +01:00
Chris Morgan
8174dff9e5 arm64: dts: rockchip: Add Anbernic RG351V
Add support for the Anbernic RG351V, which is a handheld gaming console
from Anbernic with an RK3326 SoC, a 640x480 LCD display, a single
analog joystick with several face buttons, two USB C ports, and
internal WiFi over USB. All hardware has been tested as working
except for the battery, which will require further modification to the
mainline rk817 battery driver before it can be used (the device was
built without a shunt resistor, and as such the battery cannot
measure current; only voltage).

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20231120230131.57705-4-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:48 +01:00
Chris Morgan
9e63209d20 arm64: dts: rockchip: Split RG351M from Odroid Go Advance
Split the RG351M into its own DTSI file. The RG351M, unlike the Odroid
Go Advance, has no ADC joysticks, no GPIO buttons (except for volume
on the RG351V), a PWM vibrator that interferes with an Odroid
regulator, and different LEDs. Split the RG351M into a DTSI file
that can then be imported into the DTS files for the RG351M and a
new RG351V.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20231120230131.57705-3-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:48 +01:00
Chris Morgan
8a64f5f0c6 dt-bindings: arm: rockchip: Add Anbernic RG351V
The Anbernic RG351V is a portable gaming console from Anbernic with the
RK3326 SoC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231120230131.57705-2-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:48 +01:00
Dragan Simic
b0140a1b3b arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3588(S) boards
Add ethernet0 alias to the board dts files for a few supported RK3588 and
RK3588S boards that had it missing.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/9af2026bf8a5538aff627381289cb06f2fab4263.1702368023.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:48 +01:00
Dragan Simic
36d9b3ae70 arm64: dts: rockchip: Add ethernet0 alias to the dts for RK3566 boards
Add ethernet0 alias to the board dts files for a few supported RK3566 boards
that had it missing.  Also, remove the ethernet0 alias from one RK3566 SoM
dtsi file, which doesn't enable the GMAC, and add the ethernet0 alias back to
the dependent board dts files, which actually enable the GMAC.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/d2a272e0ae0fff0adfab8bb0238243b11d348799.1702368023.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:48 +01:00
Dragan Simic
b110e4cc44 arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for PX30
Not all supported boards actually use the PX30's built-in (G)MAC, while the
SoC TRM and the datasheet don't define some standard numbering in this case.
Thus, remove the ethernet0 alias from the PX30 SoC dtsi file, and add the same
alias back to the appropriate board dts(i) files.

This is quite similar to the already performed migration of the mmcX aliases
from the Rockchip SoC dtsi files to the board dts(i) files.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/0d9da8959b4f567622676c34b5feb74c49489554.1702366958.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:48 +01:00
Dragan Simic
9012ab6bd0 arm64: dts: rockchip: Remove ethernetX aliases from the SoC dtsi for RK3328
Not all supported boards actually use the RK3328's built-in GMACs, while the
SoC TRM and the datasheet don't define some standard numbering in this case.
Thus, remove the ethernet0 and ethernet1 aliases from the RK3328 SoC dtsi file,
and add the same alias back to the appropriate board dts(i) files.

These changes also touch one RK3318-based board dts, because it actually
depends on the RK3328 SoC dtsi and enables one of the GMACs.

This is quite similar to the already performed migration of the mmcX aliases
from the Rockchip SoC dtsi files to the board dts(i) files.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/0c14f2e354d32f5d45c718ce16643553ca72f6a5.1702366958.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:47 +01:00
Dragan Simic
c900fef5de arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3368
Not all supported boards actually use the RK3368's built-in GMAC, while the
SoC TRM and the datasheet don't define some standard numbering in this case.
Thus, remove the ethernet0 alias from the RK3368 SoC dtsi file, and add the
same alias back to the appropriate board dts(i) files.

This is quite similar to the already performed migration of the mmcX aliases
from the Rockchip SoC dtsi files to the board dts(i) files.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/77115184d633190c917d868f883070e100d93dbc.1702366958.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:47 +01:00
Dragan Simic
5d90cb1edc arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for RK3399
Not all supported boards actually use the RK3399's built-in GMAC, while the
SoC TRM and the datasheet don't define some standard numbering in this case.
Thus, remove the ethernet0 alias from the RK3399 SoC dtsi file, and add the
same alias back to the appropriate board dts(i) files.

This is quite similar to the already performed migration of the mmcX aliases
from the Rockchip SoC dtsi files to the board dts(i) files.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20879826c01fb9ead71c339866846ea794669802.1702366958.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:47 +01:00
David Heidelberg
c87847cfc1 arm64: dts: rockchip: make dts use gpio-fan matrix instead of array
No functional changes.

Adjust to comply with dt-schema requirements
and make possible to validate values.

Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20231209171653.85468-2-david@ixit.cz
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:47 +01:00
Johan Jonker
998513442c arm64: dts: rockchip: add gpio alias for gpio dt nodes
Rockchip SoC TRM, SoC datasheet and board schematics always refer to
the same gpio numbers - even if not all are used for a specific board.
In order to not have to re-define them for every board add the
aliases to SoC dtsi files.

Co-developed-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/56daeead-1d35-44bb-00c0-614b84a986de@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:47 +01:00
Lukasz Luba
f56804453a arm64: dts: rockchip: Add dynamic-power-coefficient to rk3399 GPU
Add dynamic-power-coefficient to the GPU node. That will create Energy
Model for the GPU based on the coefficient and OPP table information.
It will enable mechanism such as DTMP or IPA to work with the GPU DVFS.
In similar way the Energy Model for CPUs in rk3399 is created, so both
are aligned in power scale. The maximum power used from this coefficient
is 1.5W at 600MHz.

Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Link: https://lore.kernel.org/r/20231127081511.1911706-1-lukasz.luba@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:47 +01:00
Heiko Stuebner
a86e88043d arm64: dts: rockchip: add rk3588 spi aliases to soc dtsi
The spi controllers on rk3588 are named spi0 - spi4. Board schematics
also use these exact numbers and we want those names to also reflect
in the OS devices because everything else would just cause confusion.
Userspace spi access is a thing afterall.

To prevent each board repeating their list of spi aliases, define them
in the soc dtsi, as previous Rockchip soc like the rk356x do already.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231205164842.556684-5-heiko@sntech.de
2023-12-12 21:43:47 +01:00
Heiko Stuebner
a024abedbc arm64: dts: rockchip: add rk3588 gpio aliases to soc dtsi
The gpio controllers on rk3588 are named gpio0 - gpio4. Board schematics
also use these exact numbers and we want those names to also reflect
in the OS devices because everything else would just cause confusion.
Userspace gpio access is a thing afterall.

To prevent each board repeating their list of gpio aliases, define them
in the soc dtsi, as previous Rockchip soc like the rk356x do already.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231205164842.556684-4-heiko@sntech.de
2023-12-12 21:43:47 +01:00
Heiko Stuebner
328e901b7b arm64: dts: rockchip: add rk3588 i2c aliases to soc dtsi
The i2c controllers on rk3588 are named i2c0 - i2c8. Board schematics
also use these exact numbers and we want those names to also reflect
in the OS devices because everything else would just cause confusion.
Userspace i2c access is a thing afterall.

To prevent each board repeating their list of i2c aliases, define them
in the soc dtsi, as all previous Rockchip soc do already.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231205164842.556684-3-heiko@sntech.de
2023-12-12 21:43:46 +01:00
Heiko Stuebner
9918d10d16 arm64: dts: rockchip: move rk3588 serial aliases to soc dtsi
The serial ports on rk3588 are named uart0 - uart9. Board schematics
also use these exact numbers and we want those names to also reflect
in the OS devices because everything else would just cause confusion.

To prevent each board repeating their list of serial aliases, move them
to the soc dtsi, as all previous Rockchip soc do already.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231205164842.556684-2-heiko@sntech.de
2023-12-12 21:43:46 +01:00
Heiko Stuebner
d1b8b36a2c arm64: dts: rockchip: add Theobroma Jaguar SBC
Add a board dts for the Jaguar SBC from Theobroma-Systems

JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and
is targeting Autonomous Mobile Robots (AMR).

It features:
 * LPDDR4X (up to 16GB)
 * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131)
 * PCIe 3.0 4-lane on M.2 M-key connector
 * PCIe 2.1 1-lane on M.2 E-key
 * USB 2.0 on M.2 E-key
 * 2x USB3 OTG type-c ports with DP Alt-Mode
 * USB2 host port
 * HDMI output
 * 2x camera connectors, each exposing:
   * 2-lane MIPI-CSI
   * 1v2, 1v8, 2v8 power rails
   * I2C bus
   * GPIOs
 * PPS input
 * CAN
 * RS485 UART
 * FAN connector
 * SD card slot
 * eMMC (up to 256GB)
 * RTC backup battery
 * Companion microcontroller
   * ISL1208 RTC emulation
   * AMC6821 PWM emulation
   * On/off buzzer control
 * Secure Element
 * 80-pin Mezzanine connector for daughterboards:
   * GPIOs
   * 1Gbps Ethernet
   * PCIe 2.1 1-lane
   * 2x 2-lane MIPI-CSI
   * ADC channel
   * I2C bus
   * PWM
   * UART
   * SPI
   * SDIO
   * CAN
   * I2S
   * 1v8, 3v3, 5v0, dc-in (12-24V) power rails

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Link: https://lore.kernel.org/r/20231201191103.343097-3-heiko@sntech.de
2023-12-12 21:43:46 +01:00
Heiko Stuebner
ba2110e546 dt-bindings: arm: rockchip: Add Theobroma-Systems Jaguar SBC
Add the binding for the Jaguar board from Theobroma-Systems.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231201191103.343097-2-heiko@sntech.de
2023-12-12 21:43:46 +01:00
Chris Morgan
e99adc97e2 arm64: dts: rockchip: Add Powkiddy X55
Add support for the Powkiddy X55. The Powkiddy X55 is a handheld
gaming device with a 720p 5.5 inch screen powered by the Rockchip
RK3566 SoC. It includes a Realtek 8821cs WiFi/BT module, 2 ADC
joysticks powered by 4 dedicated ADC channels, and several GPIO
face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), and an
8GB internal eMMC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20231204185719.569021-11-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:46 +01:00
Chris Morgan
18f413c5dc dt-bindings: arm: rockchip: Add Powkiddy X55
The Powkiddy X55 is a handheld gaming device made by Powkiddy and
powered by the Rockchip RK3566 SoC. This device is somewhat similar
to the existing Powkiddy RK3566 devices, which have been grouped
together with a previous commit[1].

[1] https://lore.kernel.org/linux-rockchip/20231117202536.1387815-1-macroalpha82@gmail.com/T/#m4764997cfafaca22fe677200de96caa5fb8f0005

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204185719.569021-10-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:46 +01:00
Sebastian Reichel
0773a4a199 arm64: dts: rockchip: add USB3 host to rock-5a
Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds
USB3 for the lower USB3 port (the one closer to the PCB).

The upper USB3 port uses the RK3588 USB TypeC host controller, which
use a different PHY without upstream support.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:46 +01:00
Sebastian Reichel
f97d78b9f6 arm64: dts: rockchip: add USB3 host to rock-5b
Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds
USB3 for the upper USB3 port (the one further away from the PCB).

The lower USB3 and the USB-C ports use the RK3588 USB TypeC host
controller, which use a different PHY without upstream support.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231106155934.80838-1-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:46 +01:00
shironeko
20d03e1384 arm64: dts: rockchip: add missing tx/rx-fifo-depth for rk3328 gmac
Without fifo depths attempting to change the MTU will fail. These values
are from the RK3328 Technical Reference Manual, gmac2io interface tested
with Rock64.

Signed-off-by: shironeko <shironeko@tesaguri.club>
Link: https://lore.kernel.org/r/20231116214042.11134-2-shironeko@tesaguri.club
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:46 +01:00
Trevor Woerner
c45de75d7a arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s
Add names to the pins of the general-purpose expansion header as given in the
Radxa GPIO page[1] following the conventions in the kernel documentation[2] to
make it easier for users to correlate the pins with functions when using
utilities such as gpioinfo.

[1] https://wiki.radxa.com/RockpiS/hardware/gpio
[2] Documentation/devicetree/bindings/gpio/gpio.txt

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-12 21:43:36 +01:00
Jagan Teki
2e9b4e598d arm64: dts: rockchip: Use NCM6A-IO board for edgeble-neu6b
Edgeble AI 6TOPS board topology is now changed in final revisions
as a compatible IO board, NCM6A-IO, is made available for both
variants of SoM: NCM6A and NCM6B.

With this change, 6b-io is not as available and 6a; 6b SoM's have
the same compatible IO board as 6a-io. This change is due to the
common optimised design of the IO board made available now in
final revisions, which was not the case in initial revisions.

So, use the NCM6A-IO compatible for NCM6B SoM based IO dts.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125142914.57459-2-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-28 11:13:06 +01:00
Jagan Teki
b685460632 dt-bindings: arm: rockchip: Update edgeble-neu6 bindings
Current binding has following compatible combination for SoM, IO board
- NCM6A: edgeble,neural-compute-module-6a,
	 edgeble,neural-compute-module-6a-io
- NCM6B: edgeble,neural-compute-module-6b,
	 edgeble,neural-compute-module-6b-io

This board topology now changes in final revisions, so a common
compatible IO board, NCM6A-IO, is made available for both variants
of SoM: NCM6A and NCM6B, produced by Edgeble AI.

With this change, 6b-io is not as available and 6a; 6b SoM's have the
same compatible IO board as 6a-io. This change is due to the common
optimised design of the IO board made available now in final revisions,
which was not the case in initial revisions.

Update the dt-bindings with this new change.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231125142914.57459-1-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-28 11:13:06 +01:00
Jimmy Hon
9ecf44fedc arm64: dts: rockchip: add USB3 host on rk3588s-orangepi-5
Enable USB3 host controller for the Orange Pi 5.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20231126200845.1192-1-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-28 11:13:05 +01:00
Chris Morgan
e926380ea2 arm64: dts: rockchip: Add Powkiddy RK2023
Add support for the Powkiddy RK2023. The Powkiddy RK2023 is a handheld
gaming device with a 3.5 inch screen powered by the Rockchip RK3566
SoC. The device looks physically different from the Powkiddy RGB30,
but is functionally identical except for the panel.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20231117202536.1387815-7-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20 15:30:50 +01:00
Chris Morgan
46d84ceb7e arm64: dts: rockchip: Update powkiddy,rgb30 include to rk2023 DTSI
The Powkiddy RGB30 device is similar to the Anbernic RGxx3 series,
however there are several differences which require deleting nodes in
order to properly define the hardware. This was deemed unacceptable
for the RK2023, so instead create a common include file for the
Powkiddy RGB30 and the Powkiddy RK2023. The only notable difference
between these Powkiddy devices are the panel in use, the device
name, and the PLL_VPLL frequency necessary to support the different
panels.

Since the RK2023 was released on the market first, name the common
include file after it.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20231117202536.1387815-6-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20 15:30:50 +01:00
Chris Morgan
213615d742 dt-bindings: arm: rockchip: Add Powkiddy RK2023
The Powkiddy RK2023 is a handheld gaming device made by Powkiddy and
powered by the Rockchip RK3566 SoC. Group the Powkiddy RK3566 based
devices together as they are both extremely similar.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231117202536.1387815-5-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-20 15:30:50 +01:00
Sebastian Reichel
97c39c7a09 arm64: dts: rockchip: add analog audio to RK3588 EVB1
Add support for the EVB1 analog audio to its devicetree. Only
the headphone has been tested, since I don't have matching
peripherals to test headset or speakers.

I also didn't manage to record sound from the onboard microphone,
but that also fails with the vendor kernel. Thus I assume the
microphone on my board is fried.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20231109184453.108676-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-11-16 21:15:02 +01:00