Commit Graph

1104271 Commits

Author SHA1 Message Date
Abhijeet Dharmapurikar
7bb38803c2 sched/walt: skip finding max when energy evaluating
Currently the code is finding the max_cap_cpu amongst candidates
but is unused if we are energy evaluating. Clean up the code.

Change-Id: I317ed8328851b69534c375c69387647a94ada659
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:52:30 -07:00
Satya Durga Srinivasu Prabhala
58862813fa sched/walt: skip enery evaluation for need_idle when idle CPU is available
When need_idle flag is set & lower capacity CPU is idle, there is no need
to go for energy evaluation with higher capacity CPUs. Placement code used
to skip energy evaluation in previous Kernels, this commit matches the
need_idle functionality of previous Kernels.

Change-Id: Ib21baa2b99e882e27550894ef814ed7114d01e8c
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2022-06-28 18:52:29 -07:00
Satya Durga Srinivasu Prabhala
2dd3a6b665 sched/walt/core_ctl: use printk_deferred() in case of errors
It is possible that the Pause and Resume operations fail and
using pr_warn() could lead to core ctl task running for long
period when it has to push the logbuf data to console which
eventually cause RT throttling. Avoid this scenario by using
printk_deferred() instead of pr_warn().

Change-Id: I2717205216caf994a8995d6f11178499a7015201
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2022-06-28 18:52:29 -07:00
Stephen Dickey
55bfad9a22 sched/walt: allow reference to walt debug capabilities
Debug capabilities are needed throughout walt files, while
the walt-specific debug/dumping capabilities are strictly in
walt.c and dependent upon local variables.

Support the ability to cause a crash across all walt functionality.

Change-Id: I10fffcf028e39964f92b4a5c05dfd35f0eff63fb
Signed-off-by: Stephen Dickey <dickey@codeaurora.org>
2022-06-28 18:52:28 -07:00
Rishabh Bhatnagar
61cf79010e sched: walt: Use unsigned long type for counter values
Use unsigned long data type for counter values since the
pmu and amu counters can be 64 bit based on the hardware
capability.

Change-Id: I27f5e4d0741d7a0a1a7a6cc17edb9028a138708d
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:52:27 -07:00
Stephen Dickey
51542a1e24 sched/walt_rt: Honor sync wakeups
The current code does not honor sync wakeup. Make it do that.

Change-Id: I509fd704accdebd32ad2281c26a23e2044c6dc09
Signed-off-by: Stephen Dickey <dickey@codeaurora.org>
2022-06-28 18:52:27 -07:00
Shaleen Agrawal
f2c3618a64 sched: walt: use scale_cpu for energy evals
Currently, when adjusting the max util with respect to current cluster
frequency, we use capacity_orig_of as the multiplier. This is incorrect,
because capacity_orig_of will change depending on the current max freq.

Change-Id: Ifb38c46a8dc68d18458f6b683f0e8e66857a0644
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:52:26 -07:00
Satya Durga Srinivasu Prabhala
8ce4bfae2f sched/walt: correct return value for walt_pause/resume_cpus()
It is possible that pause/resume of CPUs can fail, but
walt_pause/resume_cpus() always returns zero which turns
even failures into success. This would leave clients go
into bad state in case of failures. To avoid such issues
separate out ref count updates and clearing pause/resume
masks (when the CPUs are already paused/resumed cases) and
rearrange the code appropriately to make sure ref counting
is properly handled in case of errors.

Change-Id: I284752bf9372cada30a2b648f1c9c54446923117
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2022-06-28 18:52:25 -07:00
Abhijeet Dharmapurikar
92074a3d0d sched/walt: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: I306ff3e6fb571efd7ab6cfc36edcbb4dfa264c3d
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:52:24 -07:00
Rishabh Bhatnagar
d555a988e2 sched: walt: Fix the logic for detecting enq/deq
The dequeue boolean flag is used to calculate the
busy hysteresis time which helps delay lpms. Fix the logic
to detect whether its an enqueue or a dequeue.

Change-Id: Ie7177bba80aa3d164a27587290194c0d13929384
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:52:24 -07:00
Rishabh Bhatnagar
61bc547150 sched: Use IS_ENABLED macro to check if config is enabled
Use IS_ENABLED macro to check for a config flag instead of using
ifdef.

Change-Id: I1c703f9abddf1f66e5b2795f4cf9a1b230f8da4f
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:52:23 -07:00
Shaleen Agrawal
0fade348a5 sched: suppress silver region frequency boost
Currently, we boost frequencies by 25% across the board. However, due to
region 3 silver CPUs energy concerns, we don't want to apply this boost
provided that the utilization on silver CPUs is high enough.
Additionally, there is the caveat that if the contribution from RT task
is high enough (currently hard coded to 25% of silver capacity), we
continue to apply the boost.

To manipulate the silver threshold (set to 1000 by default, therefore
this is disabled), use:

echo x > /proc/sys/walt/sched_silver_thres .

Change-Id: If689d0935f0c60f7ccc19e63780286c815eb801a
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:52:22 -07:00
Rishabh Bhatnagar
a07c897772 sched: walt: Add AMU based instructions and cycle counts
Add AMU based cycle and instruction counts to sched_switch_with_ctrs
tracepoint. This will help get cycle and instruction counts if the
AMUs are supported by hardware.

Change-Id: Ia014b6b5afb143f4f790350843f37ae479075ae7
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:52:21 -07:00
Shaleen Agrawal
6c47bb351e sched:walt: register restricted tracehooks for race with pause
The current code in force_compatible_cpus_allowed_ptr() holds just
the cpus_read_lock, i.e. serializes with the second  step of pause.
However it doesn't serialize with the first step. IOW, a CPUX chosen
in __set_cpus_allowed_ptr_locked() may end up getting deactivated in
the pause first and stopper ends up returning early in __migrate_tasks()
leaving the 32bit task on an invalid CPU.

A simple fix is to serialize force_compatible_cpus_allowed_ptr() with
pause first step. Add a cpu_maps_update_begin/done() in
force_compatible_cpus_allowed_ptr().

Change-Id: I24e7838ee9813b4336bfcebc823e498c3606c793
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:52:21 -07:00
Shaleen Agrawal
5c3c385a68 sched: walt: Ensure only valid cpu selected
Under FBT, we currently do not check if an active candidate is actually
valid before setting it as part of the candidates mask. This can lead to
page faults.

Change-Id: I5aedb3bd1e076736270aa03b8889c67606c2a25d
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:52:20 -07:00
Shaleen Agrawal
228d91e408 sched: walt: Add cgroup_attach trace point
In order to debug tasks not being added to top-app group correctly,
introduce a tracepoint to aid with such scenarios.

Change-Id: Ibdfaf00f65661dc2700f30c951ab8be711cda2b2
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:52:19 -07:00
Elliot Berman
2b51bbee3b Revert "sched:walt: register tracehooks for race with pause"
This reverts commit 17e292f2531be14480932e1c1934ebb5bf42e720.

Change-Id: I302081c5218cb55ce5d900189d7e3301d1a8c56e
Signed-off-by: Elliot Berman <eberman@codeaurora.org>
2022-06-28 18:52:19 -07:00
Stephen Dickey
72cb1a9422 sched/walt: prevent lockup when system is suspending
When the system is suspending, the console itself can be locked
up for a period of time. Unfortunately, pr_err will wait until
the console is unlocked, causing significant delays. This causes
a defect that seems to point to walt_pause.

Fix this by ensuring that all pr_err statements are eliminated
by using printk_deferred throughout walt_pause. This will ensure
that the operation is not locked on console access.

Change-Id: Id2e93a33d5c272fe0ee9b6f18bef5eb8ad4de07d
Signed-off-by: Stephen Dickey <dickey@codeaurora.org>
2022-06-28 18:52:18 -07:00
Shaleen Agrawal
4969204927 sched:walt: register tracehooks for race with pause
The current code in force_compatible_cpus_allowed_ptr() holds just
the cpus_read_lock, i.e. serializes with the second  step of pause.
However it doesn't serialize with the first step. IOW, a CPUX chosen
in __set_cpus_allowed_ptr_locked() may end up getting deactivated in
the pause first and stopper ends up returning early in __migrate_tasks()
leaving the 32bit task on an invalid CPU.

A simple fix is to serialize force_compatible_cpus_allowed_ptr() with
pause first step. Add a cpu_maps_update_begin/done() in
force_compatible_cpus_allowed_ptr().

Change-Id: If118aabf9e1252e58dcfe52609d59520c029bc41
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:52:17 -07:00
Sai Harshini Nimmala
4e9150549c sched/walt: Fix scheduling while atomic
walt_init() is a function that could sleep and it should not be called
in an atomic context.
Introduce a work to do walt init.

Change-Id: Ief3e9500d7675b998220693ac1908ac74e876f50
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
2022-06-28 18:52:17 -07:00
Sai Harshini Nimmala
1b1ec2daf6 sched: Enable walt debug module in first stage
To catch early errors, it's important to ensure that the walt debug
module is insmodded early.

Change-Id: I1418c16a30041469aa04025018a1f0a79065c390
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
Signed-off-by: Sai Harshini Nimmala <quic_snimmala@quicinc.com>
2022-06-28 18:51:35 -07:00
Shaleen Agrawal
cfb4162ea3 sched: walt: Fix max_util calculation
When calculating max_util for energy evaluations, we adjust the util on
the basis of frequency, using arch_scale_freq_capacity. However, the
return value is scaled to 1024 and not to the capacity of the CPU.

Change-Id: I214ac4b40b88105147c2e5dcc350ff1601496d4c
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:51:10 -07:00
Abhijeet Dharmapurikar
8d553f6471 sched/walt: print per cluster energy
Per cluster energy contribution is essential to debug energy evaluation.
Add code to print it.

Change-Id: Ifbe80d125b09facd358933ab3537260fea0584ac
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:51:09 -07:00
Satya Durga Srinivasu Prabhala
32eccdc2bf sched/walt: consolidate multiple rcu unlock statements
rcu unlock is being called in multiple places in walt_find_best_target().
Consolidate these calls.

Change-Id: I86701bc975fcc7d68b6faa95b952b9dd40c2f8a9
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2022-06-28 18:51:08 -07:00
Shaleen Agrawal
ee77eeeb73 sched: walt: Setup complex sibling hints at init
Currently, we are determining the L2 cache sibling of silvers at runtime
on every iteration FBT. It is better to do this setup once, and gather
this information from hardware rather than hardcoding the results.

Change-Id: I06ec2f590dc9ccc2ec9161f1a60eb47d77244153
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:51:07 -07:00
Sai Harshini Nimmala
d5046c9052 sched/walt: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: Ieca864be1e26e39c56fd0be6be135d4085e5d8aa
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:51:06 -07:00
Abhijeet Dharmapurikar
edad9aa298 sched/walt: use just 3% energy criteria
Currently we use ~6% (right shift by 4 is really 6.25%) as a
threshold of energy
saving to move a task to a cpu other than the prev_cpu.
Change it to 3%.

Change-Id: I0d0177bbef2c22bcf37e6da42c3ed857f986c478
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:51:02 -07:00
Abhijeet Dharmapurikar
b1361e13a7 sched/walt: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: Ib4c5091436e0536bcb2ee63e9a31d9b1dd51dbe9
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:51:00 -07:00
Abhijeet Dharmapurikar
808c1b4e14 sched/walt: initiate initialization after topology
The proper kernel provides tracehooks to indicate when its done
initializing topology. Use that hook to simplify walt initialization.

Change-Id: Ifa7540f2f65bf469c1f8007bb15d5e1317475929
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:59 -07:00
Abhijeet Dharmapurikar
b053fa9fdc sched/walt: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: I9e3d2f76f07c2b2f2a5d4a6d9831489251de1455
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:58 -07:00
Abhijeet Dharmapurikar
04f5df4cba sched/walt: handle overlap between silver and gold
When a task is being placed on silver and is not a filtered task and is
not a small task, look for a gold for this task.

Change-Id: Ic6f5a047e4f25c66f4b7be1f0b48ca49a2c5aa50
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:57 -07:00
Abhijeet Dharmapurikar
11d8a97073 sched/walt: use prs for energy evaluation
Currently, the code uses walt util for energy evaluation. That could be
inaccurate because walt prs signals drive cpufreq. Change to using
prs.

Change-Id: Iea073c7963bf27ab1308950b07a2aead1c73805c
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:53 -07:00
Abhijeet Dharmapurikar
31be7e0e1e sched/walt: skip energy for uninvolved cluster
A cluster that does not host prev cpu and or any of the candidates
doesn't affect the energy values. Don't calculate their contributions.

Change-Id: Id1b890dbf157fa27d90287202f7916c6ab102bba
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:52 -07:00
Abhijeet Dharmapurikar
71a5697adb sched/walt: create walt friendly energy apis
Create walt lookalikes for compute_energy (walt_pd_
compute_energy) and em_cpu_energy (walt_em_cpu_energy).

Change-Id: Ib6cb0b90c1041b0d1c97729c1998c618fd60c81c
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:51 -07:00
Abhijeet Dharmapurikar
1156ad0e3b sched/walt: Track best target cpu for each cluster
Currently, energy evaluation occurs only on one target cpu chosen
across all CPU clusters.
Change the algorithm to track target cpus for each cluster and
subsequently perform energy calculations on these candidates.
For a cluster, if both an idle cpu and a busy cpu is found, prefer
idle cpu. That also means, once idle if found there is no need to
visit upcoming busy cpus as we traverse the cpus in a cluster.

Change-Id: Idd832748cdd01e0995783b1959332acd66e94cd6
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:50 -07:00
Sai Harshini Nimmala
b7c86b3ea2 sched: walt: Move perf counter trace to dynamic trace point
Currently the  sched_switch_ctrs trace event is dependent on
debugfs to get enabled, and not compatible with all builds.

Move the sched_switch_ctrs to dynamic trace point registration
under walt dynamic tp, as the trace event has considerable
overhead and need to enabled on need basis.

Change-Id: I6d9eb328ecf14a15e27d67dd5c1a46b0383aa860
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
Signed-off-by: Stephen Dickey <dickey@codeaurora.org>
Signed-off-by: Sai Harshini Nimmala <snimmala@codeaurora.org>
2022-06-28 18:50:49 -07:00
Lingutla Chandrasekhar
242434fe46 sched: walt: support dynamic trace event registration
Some trace events might not need to be enabled always, but
needed for debug purpose. It is not optimal to register trace
event, which is used for debug purpose only. So registering such
trace events might add extra overhead in hotpaths.

So add control knob for registering such trace events to trace points,
which can be enabled whenever needed them. And can be unregister when
not needed.

To enable such event registration, write:

echo 1 > /proc/sys/walt/sched_enable_tp

And register sched_overutilized trace event with dynamic support, this
event is copied from Qais's debug change in chrome project:
https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2128628

Change-Id: I8983e31d405a635b38c7c985b56c2f564855d3e6
Signed-off-by: Lingutla Chandrasekhar <clingutla@codeaurora.org>
2022-06-28 18:50:48 -07:00
Rishabh Bhatnagar
efabb036d0 sched: Disable LPM if CONSERVATIVE_BOOST is enabled
Disable LPM for hysteresis time if CONSERVATIVE_BOOST is enabled.

Change-Id: If88513b664c00ecb2cd48961b907bec719e822a9
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:50:48 -07:00
Shaleen Agrawal
ddb1c85d60 sched: walt: Fix waltgov_next_freq format specifiers
Certain unsigned int values are being specified as %lu instead of %u and
it is leading to incorrectly displayed values.

Change-Id: I26f65ef24a89c277e2da0f88c1e3d683ef545057
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:50:47 -07:00
Stephen Dickey
9fdd530d51 sched/walt: improve debug of strange rq situations in walt
When a task is not on a rq when it should be, halt and
print some useful information.

Change-Id: Iaecbf372c712acba98879c8afb4e073d50a962f7
Signed-off-by: Stephen Dickey <dickey@codeaurora.org>
2022-06-28 18:50:46 -07:00
Rishabh Bhatnagar
004502ad2d sched/walt: add sched_busy_hyst_time trace event
Create a trace event for tracking sched_busy_hyst
behavior to improve debugging.

Change-Id: I0921d8cc7e1f0781605a4963113a18e13827d6ac
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:50:45 -07:00
Rishabh Bhatnagar
df94d80ceb sched: Add util_busy_hist feature
Add util_busy_hist feature which looks at the total cpu_util
across all CPUs as a metric for LPM biasing on CPUs.

Change-Id: Ie148178dfdc8f2b13fd447b1a87d60176f53f4a7
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:50:42 -07:00
Rishabh Bhatnagar
13b036b5ef sched: Add util busy hist sysctl tunables
Add util_busy_hist sysctl tunables which solely
look at the sum of cpu_util across CPUs as a metric for
LPM biasing on any/all CPUs.

Change-Id: Ib981c21a58059ef02772ee797808c5f30547a688
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
2022-06-28 18:50:39 -07:00
Satya Durga Srinivasu Prabhala
9d8bdac63a sched/walt: improve logging in the error paths
Printing CPUs info is useful while going through error paths.

Change-Id: If84794163b6c417d419785fdddd2eed98588f2eb
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
2022-06-28 18:50:39 -07:00
Pavankumar Kondeti
d233af280c sched/walt: Do the rq clock update before MVP tasks update
The rq clock gets updated in the scheduler tick. However, if the
lock is acquired remotely between the scheduler tick and the
vendor hook, the clock update flags gets reset. Do the clock
update in walt_cfs_account_mvp_runtime based on the clock update
flags.

Change-Id: Ie4254a191a18458cf1684070bc96ff63cf0103d3
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
2022-06-28 18:50:37 -07:00
Pavankumar Kondeti
5a4738726d sched/walt: Fix locking issue in MVP tasks update
Protect MVP tasks list access in the tick path with rq lock.

Change-Id: I387aa104cbacaf445bf739b8fb6d631283bd0ada
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
2022-06-28 18:50:37 -07:00
Abhijeet Dharmapurikar
8bbd8002ed sched/walt: Improve the scheduler
This change is for general scheduler improvement.

Change-Id: I3280c12b5446b8c12fd4269efc2c1dad70e4ae6a
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2022-06-28 18:50:36 -07:00
Shaleen Agrawal
d804178181 sched: walt: Adjust nomenclature
Change min_freq and max_freq to be policy_min_freq, policy_max_freq.

Change-Id: Ief7ee31209338e6fc25f4ad8933b60256ac5eb95
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:50:35 -07:00
Shaleen Agrawal
39605473ba sched: walt: expand waltgov_util_update trace point
When experiencing frequency related issues, it will be helpful to be
aware of any potential clamping issues, as well as reasons why we might
end up not updating to a different frequency.

Change-Id: I0be24d713421357e077cd01d5c84f43138a17b24
Signed-off-by: Shaleen Agrawal <shalagra@codeaurora.org>
2022-06-28 18:50:34 -07:00
Tengfei Fan
a62a217748 sched/fair: Add sched_sync_hint_enable node
Add sched_sync_hint_enable not to enable/disable sync.

Change-Id: I455545487d002b4e3caf96c6cf8569549c3b1bbe
Signed-off-by: Tengfei Fan <tengfeif@codeaurora.org>
2022-06-28 18:50:33 -07:00