-CONFIG_MEMCG_SWAP=y which default y
-CONFIG_SECCOMP=y which default y
-CONFIG_POWER_AVS=y which is removed upstream.
-CONFIG_ZBOOT_ROM_TEXT=0x0 which default 0x0
-CONFIG_ZBOOT_ROM_BSS=0x0 which default 0x0
reorder some configs.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Ifc45b074751a9ef8d0e5390102fe6c4cc9d5bab2
-CONFIG_MEMCG_SWAP=y which default y
-CONFIG_SECCOMP=y which default y
-CONFIG_POWER_AVS=y which is removed upstream.
reorder some configs.
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I1b5651ce91a06f69a6cafb116ad2b67c1850a0a1
This reverts part of commit 251c226c35 ("rk: revert to v4.19").
To keep the changes of include/dt-bindings/soc/rockchip,boot-mode.h.
Change-Id: I4bcb721da1bea0600c92d4e23d33320bff8d0caf
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
There is not need to build mach-rockchip when PSCI is enabled.
Save about 5K text, 7K data and fix compilation error for THUMB2_KERNEL.
Change-Id: Ieb17867592d7d49a8b983dc5c7e8d1d1df14d864
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
The lz4 Legacy format(which specified by -l) is
not supported by U-Boot.
Change-Id: I6b94881117b59384daca4efd796c933e8dc9e5a6
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
fs/incfs/format.c: In function 'incfs_read_next_metadata_record':
./include/linux/kern_levels.h:5:18: warning: format '%ld' expects argument of type 'long int', but argument 2 has type 'size_t {aka unsigned int}' [-Wformat=]
fs/incfs/format.c:619:3: note: in expansion of macro 'pr_warn'
pr_warn("incfs: The record is too large. Size: %ld",
^~~~~~~
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: I1a0b1e32761dd4358ff3ca210041893373f0a1a5
Test on RV1126 board with UVC function. When do UVC streaming on/off
@H265 3840 * 2160 stress test, it fails to streaming on UVC with the
following log:
[ 1589.834573] WARNING: CPU: 3 PID: 3075 at drivers/usb/dwc3/gadget.c:1611 dwc3_gadget_ep_queue+0x148/0x178
[ 1589.834593] ep3in: request 638c13d3 already in flight
[ 1589.834603] Modules linked in: galcore(O)
[ 1589.834622] CPU: 3 PID: 3075 Comm: kworker/3:2 Tainted: G W O 4.19.111 #2
[ 1589.834631] Hardware name: Generic DT based system
[ 1589.834648] Workqueue: events uvcg_video_pump
[ 1589.834673] [<b010f408>] (unwind_backtrace) from [<b010b96c>] (show_stack+0x10/0x14)
[ 1589.834741] [<b010b96c>] (show_stack) from [<b0645104>] (dump_stack+0x90/0xa4)
[ 1589.834766] [<b0645104>] (dump_stack) from [<b0126204>] (__warn+0xfc/0x114)
[ 1589.834787] [<b0126204>] (__warn) from [<b0126260>] (warn_slowpath_fmt+0x44/0x68)
[ 1589.834806] [<b0126260>] (warn_slowpath_fmt) from [<b04571d8>] (dwc3_gadget_ep_queue+0x148/0x178)
[ 1589.834826] [<b04571d8>] (dwc3_gadget_ep_queue) from [<b0472074>] (uvcg_video_pump+0x94/0x164)
[ 1589.834849] [<b0472074>] (uvcg_video_pump) from [<b013cce0>] (process_one_work+0x1f0/0x408)
[ 1589.834869] [<b013cce0>] (process_one_work) from [<b013d9b8>] (worker_thread+0x30/0x564)
[ 1589.834891] [<b013d9b8>] (worker_thread) from [<b0142910>] (kthread+0x140/0x170)
[ 1589.834907] [<b0142910>] (kthread) from [<b01010d8>] (ret_from_fork+0x14/0x3c)
[ 1589.834922] Exception stack(0xbbdfffb0 to 0xbbdffff8)
[ 1589.834938] ffa0: 00000000 00000000 00000000 00000000
[ 1589.834953] ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 1589.834966] ffe0: 00000000 00000000 00000000 00000000 00000013 00000000
[ 1589.834979] ---[ end trace b30d445a1f050523 ]---
[ 1589.834979] ---[ end trace b30d445a1f050523 ]---
[ 1589.834992] Failed to queue request (-22).
It's because that the __dwc3_gadget_start_isoc is called very late after
XferNotReady, so the frame number is outdated and start transfer fail
with the cmd_status "DEPEVT_TRANSFER_BUS_EXPIRY". In this case, the dwc3
driver return -EINVAL to the UVC function driver without delete and unmap
the failed request, this cause the request requeue fail next time.
Change-Id: I4cc919bcd4e1e0abbb6a929483e6fc2fe7dc9750
Signed-off-by: William Wu <william.wu@rock-chips.com>
Currently __dwc3_gadget_start_isoc must be called very shortly after
XferNotReady. Otherwise the frame number is outdated and start transfer
will fail, even with several retries.
DSTS provides the lower 14 bit of the frame number. Use it in combination
with the frame number provided by XferNotReady to guess the current frame
number. This will succeed unless more than one 14 rollover has happened
since XferNotReady.
Start transfer might still fail if the frame number is increased
immediately after DSTS is read. So retries are still needed.
Don't drop the current request if this happens. This way it is not lost and
can be used immediately to try again with the next frame number.
With this change, __dwc3_gadget_start_isoc is still not successfully in all
cases bit it increases the acceptable delay after XferNotReady
significantly.
Change-Id: I656b487b9a265921ae612a071ebcd496ffe5f510
Reviewed-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit c5a7092f40)
It was recommended by ECN document, so following it will make
less risk in probing devices in case the refclk is coming from
SoC.
Change-Id: Ic4514f373b6014c406d5436738419c64df6d32b2
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
To support multi-display output_if must be clean when
hdmi disable.
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ic4205a59ce1adab7f4ac6f673c740a14556fdeae
Since kmalloc may not care about GFP_DMA32, change to use get free pages
for itt on its device.
Change-Id: I2e91c97bd4d61d2542cf437363fc3dd1d9fa669c
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
regulator_disable/enable() accessories may not be supported by
all regulator drivers such as gpio regulator. In order to compliant
to all, it would be better to call a .set_voltage() before enabling
or disabling regulators as this hook fits for all, no metter if enable
or disable hooks were implemented.
Change-Id: Id6c67728ed29ae76986908908361dec966724a3e
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
There are two sets of NAND flash drivers. The NAND flash state needs
to be restored to the default value after detection.
bug:
[ 2.722218] No.1 FLASH ID:45 3a 94 93 76 51
[ 2.726295] toshiba RR 18 row=400,count 18,status=-1
[ 2.726353] flash_read_page_en 0 400 error_ecc -1 1
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I80c95a68ad900e0653684ba3978e59102d27bf70
Rename rkvdec2 functions which have the same name to the rkvdec
functions.
Change-Id: I188ce1afa8e9fab0a63813a4071e42b51fe92ccf
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
Should not be zero ahead, otherwise the min voltage is interpreted
as a wrong value by regulator code.
Change-Id: Ia141583f411a54bf26cb88b3992687539f29fec8
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
__be16 = cpu_to_be16(__be16) is nonsense. Do it right.
../drivers/gpu/drm/drm_dsc.c:218:53: warning: incorrect type in assignment (different base types)
../drivers/gpu/drm/drm_dsc.c:218:53: expected restricted __be16
../drivers/gpu/drm/drm_dsc.c:218:53: got int
../drivers/gpu/drm/drm_dsc.c:225:25: warning: cast from restricted __be16
../drivers/gpu/drm/drm_dsc.c:225:25: warning: incorrect type in argument 1 (different base types)
../drivers/gpu/drm/drm_dsc.c:225:25: expected unsigned short [usertype] val
../drivers/gpu/drm/drm_dsc.c:225:25: got restricted __be16
../drivers/gpu/drm/drm_dsc.c:225:25: warning: cast from restricted __be16
../drivers/gpu/drm/drm_dsc.c:225:25: warning: cast from restricted __be16
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: David Francis <David.Francis@amd.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190710125143.9965-2-ville.syrjala@linux.intel.com
Reviewed-by: Sean Paul <sean@poorly.run>
(cherry picked from commit 40d51c05d0)
Change-Id: Ia0bebf00c978b2a2bd8750de1210f9ee30e62cdb
The DP 1.4 spec defines the SDP header and SDP contents for
a Picture Parameter Set (PPS) that must be sent in advance
of DSC transmission to define the encoding characteristics.
This was done in one struct, drm_dsc_pps_infoframe, which
conatined the SDP header and PPS. Because the PPS is
a property of DSC over any connector, not just DP, and because
drm drivers may have their own SDP structs they wish to use,
make the functions that initialise SDP and PPS headers take
the components they operate on, not drm_dsc_pps_infoframe,
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-4-David.Francis@amd.com
(cherry picked from commit dbfbe717cc)
Change-Id: I691b513d778f8763e9e48e6b073a26fc1f6adb5b
Native 420 and 422 transfer modes are new in DSC1.2
In these modes, each two pixels of a slice are treated as one
pixel, so the slice width is half as large (round down) for
the purposes of calucating the groups per line and chunk size
in bytes
In native 422 mode, each pixel has four components, so the
mux component of a group is larger by one additional mux word
and one additional component
Now that there is native 422 support, the configuration option
previously called enable422 is renamed to simple_422 to avoid
confusion
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-3-David.Francis@amd.com
(cherry picked from commit 06d7cecdb6)
Change-Id: I5496e7bb6f3548fe9f59b6152ff0d72bb7d8fa7f
The function intel_compute_rc_parameters is part of the dsc spec
and is not driver-specific. Other drm drivers might like to use
it. The function is not changed; just moved and renamed.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: David Francis <David.Francis@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190221202001.28430-2-David.Francis@amd.com
(cherry picked from commit dc43332b7a)
Change-Id: I306b87e9f29ef54f7011a12336d5ad277a65b6a2
This patch adds appropriate kernel documentation for DRM DP helpers
used for enabling Display Stream compression functionality in
drm_dp_helper.h and drm_dp_helper.c as well as for the DSC spec
related structure definitions and helpers in drm_dsc.c and drm_dsc.h
Also add links between the functions and structures in the documentation.
v3:
* Fix the checkpatch warnings (Sean Paul)
v2:
* Add inline comments for longer structs (Daniel Vetter)
* Split the summary and description (Daniel Vetter)
Suggested-by: Daniel Vetter <daniel.vetter@intel.com>
Suggested-by: Sean Paul <sean@poorly.run>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Sean Paul <sean@poorly.run>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Acked-by: Sean Paul <sean@poorly.run>
Reviewed-by: Daniel Vetter <daniel.vetter@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190206213148.21390-1-manasi.d.navare@intel.com
(cherry picked from commit 05bad2357a)
Change-Id: I241d62c90db77f542690a244908ff8e1836633c4
DSC DPCD color depth register advertises its color depth capabilities
by setting each of the bits that corresponding to a specific color
depth. This patch defines those specific color depths and adds
a helper to return an array of color depth capabilities.
v2:
* Simplify the logic (Ville)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Acked-by: Sean Paul <seanpaul@chromium.org> (For merging through
drm-intel)
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127214125.17658-1-manasi.d.navare@intel.com
(cherry picked from commit 4d4101c8b3)
Change-Id: I3f8e33773f965c7b347df17be6227c253eb5a075
