Good practice dictates that we do not leak stale information to our
callers, and should avoid overwriting an outparam on an error path.
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451986951-3703-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 9649399e91)
Change-Id: Id6f2a968d66ff463481e8e090522c837b9e12730
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Unlike the handle, the name table uses a sleeping mutex rather than a
spinlock. The allocation is in a normal context, and we can use the
simpler sleeping gfp_t, rather than have to take from the atomic
reserves.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451902261-25380-3-git-send-email-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 0f646425b9)
Change-Id: I5e087d086b0cd8efbc6bbca56d2dbe6f587ad63f
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
We only need a single reference count for all handles (i.e. non-zero
obj->handle_count) and so can trim a few atomic operations by only
taking the reference on the first handle and dropping it after the last.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451902261-25380-2-git-send-email-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 98a8883ad4)
Change-Id: I49d99d2d66658591bf7dcd2a290eb3106c4f6cbb
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
If the register isn't define at rockchip_vop_reg.c, the default value
of reg.major is 0, this will lead to judge error. so we add reg.mask
conditions because if it's defined register, the reg.mask can't be 0.
Change-Id: I753b92476fda15a64f94e4a8a47894c5ac3a1a7f
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
For next Soc VOP only vopb win1 support AFBDC, so we need
add afbdc feature for every win.
Change-Id: Icbe5e26189d2147a6b81f2f75d0b855b2c35fd26
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
The driver is already made of 5 separate source files. Move it to a
newly created directory named synopsys where more Synopsys bridge
drivers can be added later (for the DisplayPort controller for
instance).
Suggested-by: Jose Abreu <Jose.Abreu@synopsys.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170303172007.26541-10-laurent.pinchart+renesas@ideasonboard.com
(cherry picked from commit 35dc8aabc8)
Change-Id: Ibf30c8dcb9f1a326f35dd7e36908d3dd2776091f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The __dw_hdmi_remove() function was missing a call to cec_notifier_put
to balance the cec_notifier_get in the probe function.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: https://patchwork.freedesktop.org/patch/msgid/a7688d13-2d61-ed16-f2df-28cbb5007f38@xs4all.nl
(cherry picked from commit e383bf85d3)
Change-Id: I59de801ba6e4c0956b6ba76a49dc57bda34c36a7
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
The video setup path aways sets the clock disable register to a specific
value, which has the effect of disabling the CEC engine. When we add the
CEC driver, this becomes a problem.
Fix this by only setting/clearing the bits that the video path needs to.
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: https://patchwork.freedesktop.org/patch/msgid/E1dcBha-00088l-DE@rmk-PC.armlinux.org.uk
(cherry picked from commit 7cc4ab225a)
Change-Id: Ic5603e5197d8107cba821ba4bc1bfbad2d12a1e2
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Add CEC notifier support to the HDMI bridge driver, so that the CEC
part of the IP can receive its physical address.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: https://patchwork.freedesktop.org/patch/msgid/E1dcBhV-00088e-8x@rmk-PC.armlinux.org.uk
(cherry picked from commit e84b8d75ac)
Change-Id: Ib3b3f6fc9e08fc3872b043f5dc36b77b50a378aa
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
If HDMI output corlor mode is YCbCr422, the tmds clock is same
to YCbCr444 8bit, phy bus width should be set to 8.
Change-Id: I6e844e676a6315ae0cb88b0bd8456f0e27fa5e0c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Use vma_pages function on vma object instead of explicit computation.
Found by coccinelle spatch "api/vma_pages.cocci"
Change-Id: Ib6158ac90566f57a23127283d9462306817599b8
Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1505946334393-988165015-7-diffsplit-thomas@m3y3r.de
(cherry picked from commit f2a44dd023)
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
RK618 provides a complete set of display interface to support
very flexible applications as follows:
- 2 RGB display input interface with double data rate
- 1 LVDS display output interface with double channels
- 1 MIPI display output interface with 4 data lanes
- 1 HDMI display output interface
- 1 RGB display output interface shared with LVDS
- 1 RGB display output interface shared with RGB display input interface
VIF is used to LCDC SDR/DDR timing reconstruction.
SCALER is a synchronous parallel RGB frame converter for different
resolution. It is used to realize dual display function from
one display source. It can be used like VIF for LCDC SDR timing
reconstruction only.
DITHER is used for converting 24bit RGB888 to 18bit RGB666 with FRC
dither down.
Change-Id: I5b25e64c283bd84f85d7d7686bee6d940df44910
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
The dsp_stx and dsp_sty of plane should use crtc_ variables
in adjusted_mode, which is the actual mode we give to hw.
Change-Id: I83199c80604e076f0b91559bff18e1da3783523f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If output interlace mode, we should compare the mode->flags to
make sure the vop output timing is unchanged.
Change-Id: I98b540a970cbfff2e957bb33506866dc954f3b05
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
According to HDMI 2.0 chapter 6.1, for TMDS character Rates
avove 340Mcsc, the TMDS Clock Rate shall be one fourth of
the TMDS Character Rate.
Change-Id: I4cc78aa1a5fbf6cec93e787dde49e482d0b4d342
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
If color depth is automatic, it is same as 8bit.
If tmdsclk > max_tmds_clock, fall back to 8bit.
Change-Id: Ia8cbf5206831ef99456ae59add94c6f8b5a33380
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Rockchip requires bo-pages to be in the DMA32 zone. Explicitly request this
by setting __GFP_DMA32 as mapping-gfp-mask during shmem initialization.
This drops HIGHMEM from the gfp-mask and uses DMA32 instead. shmem-core
takes care to relocate pages during swap-in in case they have been loaded
into the wrong zone.
It is _not_ possible to pass __GFP_DMA32 to shmem_read_mapping_page_gfp()
as the page might have already been swapped-in at that time. The zone-mask
must be set during initialization and be kept constant for now.
Change-Id: I6db4f9e8ed716a1f7c90c7d92920122a484bf45d
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
RK3368/RK3399 mpll input clock rate is twice of mpll output
in YCBCR420 mode. This patch introduce mpll_cfg_420 to get
the platform YCBCR420 phy setting. If mpll_cfg_420 is not
exist, use mpll_cfg.
Change-Id: I7910a75394cf371a8008f8a83e3ab9ec14e9a68a
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
The configured value sets H13T PHY PLL to multiply pixel clock by the
factor in order to obtain the desired repetition clock. For the CEA
modes some are already defined with pixel repetition in the input video.
So for CEA modes this shall be always 0.
Change-Id: Iea4a00247f25c134dbd67ba77c00eb4393622385
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
To avoid screen flash when updating CSC, we introduce connector
atomic_begin. Before flush crtc and connector, it's need to send
AVMUTE flag to make screen black, and clear flag after CSC updated.
AVMUTE -> Update CRTC -> Update HDMI -> Clear AVMUTE
Change-Id: Id47caac1e25fcce5a5aa7b879da4a6b9a9bab8a1
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
atomic_begin is used to prepare for update flush.
Change-Id: I1d3a2afaea4022c065bda2b4c0746464cc0c1303
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Accdording to CTS test result, for tmds clk rate above 140M,
RK3036 pre-emphasis should be 6 and driver is 0xb.
Change-Id: I7d4fed308a200eb4da4af1514c34c0501f551126
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Accroding to CTA-861, a Source shall set scan_mode = 1 or
scan_mode = 2 if it is confident of the accuracy of those
values. Otherwise, it shall set zero(no data).
By default, an SD Video Format shall be encoded according
to SMPTE 170M [1] color space, an HD Video Format shall be
encoded according to ITU-R BT.709 [7] color space. And a
Source shall be prohibited from setting colorimetry to 1 or
2 when colorspace is RGB.
Change-Id: I0da867cca5b757b3abcac69ff71616f990f2b7bb
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
According to HDMI CTS 7-31, audio sample width and frequency
should be zero.
Change-Id: Ida37483e3f58e152e6a1c55d8bb81d0e9e0fb2ed
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
RK3036 use grf register to set HSYNC/VSYNC polarity,
and fix hdelay and vdelay setting.
Change-Id: I3146a0a146b09f64c1d875642589d0f1dc6f27df
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Introduce status node in debugfs to show HDMI output status,
such as phy status, color and eotf.
Here is a sample log:
PHY enabled Mode: HDMI
Pixel Clk: 594000000Hz TMDS Clk: 594000000Hz
Color Format: YUV422 Color Depth: 10 bit
Colorimetry: ITU.BT2020 EOTF: ST2084
x0: 0 y0: 0
x1: 0 y1: 0
x2: 0 y2: 0
white x: 0 white y: 0
max lum: 0 min lum: 0
max cll: 0 max fall: 0
Change-Id: I5d458b633dd3bd9aab67cc91f1695621937e58f5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
* linux-linaro-lsk-v4.4-android: (510 commits)
Linux 4.4.103
Revert "sctp: do not peel off an assoc from one netns to another one"
xen: xenbus driver must not accept invalid transaction ids
s390/kbuild: enable modversions for symbols exported from asm
ASoC: wm_adsp: Don't overrun firmware file buffer when reading region data
btrfs: return the actual error value from from btrfs_uuid_tree_iterate
ASoC: rsnd: don't double free kctrl
netfilter: nf_tables: fix oob access
netfilter: nft_queue: use raw_smp_processor_id()
spi: SPI_FSL_DSPI should depend on HAS_DMA
staging: iio: cdc: fix improper return value
iio: light: fix improper return value
mac80211: Suppress NEW_PEER_CANDIDATE event if no room
mac80211: Remove invalid flag operations in mesh TSF synchronization
drm: Apply range restriction after color adjustment when allocation
ALSA: hda - Apply ALC269_FIXUP_NO_SHUTUP on HDA_FIXUP_ACT_PROBE
ath10k: set CTS protection VDEV param only if VDEV is up
ath10k: fix potential memory leak in ath10k_wmi_tlv_op_pull_fw_stats()
ath10k: ignore configuring the incorrect board_id
ath10k: fix incorrect txpower set by P2P_DEVICE interface
...
Conflicts:
drivers/media/v4l2-core/v4l2-ctrls.c
kernel/sched/fair.c
Change-Id: I48152b2a0ab1f9f07e1da7823119b94f9b9e1751
[ Upstream commit 3db93756b5 ]
mm->color_adjust() compares the hole with its neighbouring nodes. They
only abutt before we restrict the hole, so we have to apply color_adjust
before we apply the range restriction.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161222083641.2691-36-chris@chris-wilson.co.uk
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 7357f89954 ]
I reported the include issue for tracepoints a while ago, but nothing
seems to have happened. Now it bit us, since the drm_mm_print
conversion was broken for armada. Fix it, so I can re-enable armada
in the drm-misc build configs.
v2: Rebase just the compile fix on top of Chris' build fix.
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1483115932-19584-1-git-send-email-daniel.vetter@ffwll.ch
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
If drm enable iommu support, rk_obj->dma_addr is iommu
mapping address, using dma_addr as dma_free_attrs's handle
is wrong, cause memory leak.
Change-Id: Iee239122602e61e9f54bdf7a90d47904d74f1c38
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
There is some hardware bug for VOP win CSC, so we ignore this function
and use the default CSC matrix.
Change-Id: I5a498bbba98563ccb5f37ebffa50b274e8422c73
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
The Dynamic Range and Mastering InfoFrame carries data such as
the EOTF and the Static Metadata associated with the dynamic
range of the video stream.
This function is introduced in the 2.11a version.
Change-Id: I279cc0665e34d75209774013882ccc8946ce6da5
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
For some display device, max_tmds_clock is 0, we think
max_tmds_clock is 340MHz. If tmdsclock > max_tmds_clock,
depth should fall back to 8bit. And If display mode support
YCBCR420, output format is YCBCR420.
Because max tmds clk of RK3368 is 340MHz, hdmi output policy
is same as mentioned above.
It is need to check tmds clock rate at the last. So we move
depth checking into dw_hdmi_rockchip_select_output.
Change-Id: I27e029fc0171b175ddbfa453ed12854ab6a7432b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
