CONFIG_ROCKCHIP_PERFORMANCE_LEVEL=0 for low performance, low power consumption
CONFIG_ROCKCHIP_PERFORMANCE_LEVEL=1 for normal performance
CONFIG_ROCKCHIP_PERFORMANCE_LEVEL=2 for high performance, high power consumption
Change-Id: I7a88f1a2e43513f647a860b427d8344e34165fa6
Signed-off-by: Liang Chen <cl@rock-chips.com>
Add common APIs to set read margin and set intermediate rate.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I8fb1d16f4ca1a9ec0ba80019197a73e56391c14c
In order to get target read margin and scmi clk earlier,
and it will also be used in later submissions.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I75bd79dc4963fa0dcc73d7c66a696e1cc0c177b7
1. only update voltage when low temperature.
2. set memory read margin only when pd is on.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7a0ae4af45b86c7a08c6ffadccb71a0db3fb44e5
As the scmi clk of npu may come from pvtpll, it should power up npu pd
and enable the pclk of pvtpll before set scmi clk. The "assigned-clocks"
in npu node will be set before npu driver probe, at this time the npu
pd may be down, so add "rockchip,init-freq" in opp table node, make
set scmi clk after npu pd is up and pclk of pvtpll is enabled.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I20fc3b6414601134645fa7f157c8ce5db9569232
Add support to get soc info and set voltage read margin.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I254a92ba124655e3efc4922a7425c1f13d384adf
Sometimes the vop line bandwidth is not high, the vop also report
buf empty err, and the frame bandwidth is high at this time, so change
ddr frequency according to frame bandwidth can fix the error.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ia893a07def99aaaa4da421b6d619a8fd3eec9745
There are issues about the field "links" of struct device
by calling pm_runtime_get_sync/pm_runtime_put_sync to
enable/disable iommu, wrap helpers to make things easy.
Change-Id: I03a85dc8c67b902e79b1e86a201b2074e2562d83
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Fixes a build break when CONFIG_ROCKCHIP_PM_DOMAINS is not selected.
drivers/video/rockchip/mpp/mpp_common.c:2286:13: error: implicit declaration of function 'rockchip_pmu_pd_is_on' [-Werror,-Wimplicit-function-declaration]
pd_is_on = rockchip_pmu_pd_is_on(mpp->dev);
^
drivers/video/rockchip/mpp/mpp_common.c:2288:3: error: implicit declaration of function 'rockchip_pmu_pd_on' [-Werror,-Wimplicit-function-declaration]
rockchip_pmu_pd_on(mpp->dev);
^
drivers/video/rockchip/mpp/mpp_common.c:2304:3: error: implicit declaration of function 'rockchip_pmu_pd_off' [-Werror,-Wimplicit-function-declaration]
rockchip_pmu_pd_off(mpp->dev);
^
Fixes: 93993a9497 ("soc: rockchip: power-domain: export pd on/off and pd status")
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
Change-Id: Idd4039639fb0884a6fccdec0e22f37888a301a98
In future it will be modified to support more rockchip platforms.
Change-Id: I5cd7ce555eefe08b12fbfcda8ef445c4b169e8c6
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Now a regulator device can supply multiple consumers at the same time,
if a consumer starts and set a low voltage, another consumer doesn't
start in kernel but has been set a high frequency in bootloader will
abort.
This patch implements the same function as the commit
d712e9b8d5 ("regulator: core: Add support to limit min_uV during system startup")
in 4.19.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I3266d120c1b9327248a509196c0c32a26c0c355e
This reverts commit 72dc50cd92.
As the system monitor support changing thermal governor and managing
cooling devices, there's no need to export system monitor devices to
thermal framework.
Change-Id: I2ee0314d6f3b342f2c7f41f7fafbb0074555759d
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
As dev_pm_opp_check_rate_volt() is implemented in file driver/opp/core.c
by rockchip, it is unsupported for gki.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I13b7b916b1b1310cf5f421e98417bdb4fc1a953a
The cpufreq core now takes the min/max frequency constraints via QoS
requests and the CPUFREQ_ADJUST notifier is removed.
The devfreq core now supports limiting the frequency range of a device
through PM QoS make use of it instead of disabling OPPs that should
not be used.
Change-Id: I3e909bd6a1ba77e565ebb0e4870f79f1e0724b46
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This adds support to limit frequency at multiple temperature zones, but
the frequency will be also changed by thermal framework if the device is
a cooling device.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I609cede78fce7e0a264fb961b422f05a45a7c949
Some special applications of video may require:
rockchip_pmu_pd_on(dev)---> force power on pd
rockchip_pmu_pd_off(dev)---> force power down pd
rockchip_pmu_pd_is_on(dev)---> pd status
Change-Id: I264d76559aef0b0540130bf29a4635a3f5380a7c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
include/soc/rockchip/rockchip_opp_select.h: In function 'rockchip_set_opp_prop_name':
include/soc/rockchip/rockchip_opp_select.h:83:9: warning: returning 'int' from a function with return type 'struct opp_table *' makes pointer from integer without a cast [-Wint-conversion]
Change-Id: Id8c0fc331bcece33692ddde2084a7e8d3142bd94
Signed-off-by: Tao Huang <huangtao@rock-chips.com>
After change OPP Table according to temperature, the system monitor will
update current voltage, but the cpufreq also will change frequency and
voltage, so a lock should be add between system monitor and cpufreq.
If use interactive governor, policy->rwsem can be used. but if use
ondemand or conservative governor, there isn't a ready-made lock,
so this patch adds a new mutex lock to protect changing voltage.
Change-Id: I5fdad482261ac5c3624048d06b3e761f5abdc6c1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
On some platforms, the mathematical model of leakage-static power
curve is quadratic equation and the leakage has a range between a
minimum and maximum.
Change-Id: I1d5101b5e5897256e32fffab4210033214e7a532
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
the phy config values used to fix in dp firmware, but some boards
need change these values to do training and get the better eye diagram
result. So support that in phy driver.
Change-Id: I195727b2a81130606e66ffc4471df74e5782a7fa
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
