- Add Versa3 clk generator to support 48KHz playback/record with audio
codec on RZ/G2L SMARC EVK
- Introduce kstrdup_and_replace() and use it
* clk-versa:
clk: vc7: Use i2c_get_match_data() instead of device_get_match_data()
clk: vc5: Use i2c_get_match_data() instead of device_get_match_data()
clk: versaclock3: Switch to use i2c_driver's probe callback
clk: Add support for versa3 clock driver
dt-bindings: clock: Add Renesas versa3 clock generator bindings
* clk-strdup:
clk: ti: Replace kstrdup() + strreplace() with kstrdup_and_replace()
clk: tegra: Replace kstrdup() + strreplace() with kstrdup_and_replace()
driver core: Replace kstrdup() + strreplace() with kstrdup_and_replace()
lib/string_helpers: Add kstrdup_and_replace() helper
* clk-amlogic: (22 commits)
dt-bindings: soc: amlogic: document System Control registers
dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema
dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema
clk: meson: axg-audio: move bindings include to main driver
clk: meson: meson8b: move bindings include to main driver
clk: meson: a1: move bindings include to main driver
clk: meson: eeclk: move bindings include to main driver
clk: meson: aoclk: move bindings include to main driver
dt-bindings: clk: axg-audio-clkc: expose all clock ids
dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
dt-bindings: clk: meson8b-clkc: expose all clock ids
dt-bindings: clk: g12a-aoclkc: expose all clock ids
dt-bindings: clk: g12a-clks: expose all clock ids
dt-bindings: clk: axg-clkc: expose all clock ids
dt-bindings: clk: gxbb-clkc: expose all clock ids
clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS
clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS
clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS
...
* clk-allwinner:
clk: sunxi-ng: nkm: Prefer current parent rate
clk: sunxi-ng: a64: select closest rate for pll-video0
clk: sunxi-ng: div: Support finding closest rate
clk: sunxi-ng: mux: Support finding closest rate
clk: sunxi-ng: nkm: Support finding closest rate
clk: sunxi-ng: nm: Support finding closest rate
clk: sunxi-ng: Add helper function to find closest rate
clk: sunxi-ng: Add feature to find closest rate
clk: sunxi-ng: a64: allow pll-mipi to set parent's rate
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate
clk: sunxi-ng: nkm: Use correct parameter name for parent HW
clk: sunxi-ng: Modify mismatched function name
clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource()
* clk-rockchip:
clk: rockchip: rv1126: Add PD_VO clock tree
clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz
clk: rockchip: rk3568: Add PLL rate for 101MHz
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.
Signed-off-by: Yangtao Li <frank.li@vivo.com>
Link: https://lore.kernel.org/r/20230705065313.67043-10-frank.li@vivo.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The device_get_match_data(), is to get match data for firmware interfaces
such as just OF/ACPI. This driver has I2C matching table as well. Use
i2c_get_match_data() to get match data for I2C, ACPI and DT-based
matching.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230721070019.96627-3-biju.das.jz@bp.renesas.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
The device_get_match_data(), is to get match data for firmware interfaces
such as just OF/ACPI. This driver has I2C matching table as well. Use
i2c_get_match_data() to get match data for I2C, ACPI and DT-based
matching.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230721070019.96627-2-biju.das.jz@bp.renesas.com
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
present before.
0#
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Merge tag 'v6.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
- PLL rates for rk3568 and the display clock tree for rv1126 which wasn't present before
* tag 'v6.6-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rv1126: Add PD_VO clock tree
clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz
clk: rockchip: rk3568: Add PLL rate for 101MHz
- Parameter name correction for ccu_nkm_round_rate()
- Implement CLK_SET_RATE_PARENT for NKM clocks, i.e. consider alternative
parent rates when determining clock rates
- Set CLK_SET_RATE_PARENT for A64 pll-mipi
- Support finding closest (as opposed to closest but not higher) clock
rate for NM, NKM, mux and div type clocks, as use it for A64
pll-video0
- Prefer current parent rate if able to generate ideal clock rate for
NKM clocks
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Merge tag 'sunxi-clk-for-6.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver changes from Chen-Yu Tsai:
- Parameter name correction for ccu_nkm_round_rate()
- Implement CLK_SET_RATE_PARENT for NKM clocks, i.e. consider alternative
parent rates when determining clock rates
- Set CLK_SET_RATE_PARENT for A64 pll-mipi
- Support finding closest (as opposed to closest but not higher) clock
rate for NM, NKM, mux and div type clocks, as use it for A64
pll-video0
- Prefer current parent rate if able to generate ideal clock rate for
NKM clocks
* tag 'sunxi-clk-for-6.6-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: nkm: Prefer current parent rate
clk: sunxi-ng: a64: select closest rate for pll-video0
clk: sunxi-ng: div: Support finding closest rate
clk: sunxi-ng: mux: Support finding closest rate
clk: sunxi-ng: nkm: Support finding closest rate
clk: sunxi-ng: nm: Support finding closest rate
clk: sunxi-ng: Add helper function to find closest rate
clk: sunxi-ng: Add feature to find closest rate
clk: sunxi-ng: a64: allow pll-mipi to set parent's rate
clk: sunxi-ng: nkm: consider alternative parent rates when determining rate
clk: sunxi-ng: nkm: Use correct parameter name for parent HW
- Fix function name in a comment in ccu_mmc_timing.c
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Merge tag 'sunxi-clk-for-6.6-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Jernej Skrabec:
- Convert sun9i-mmc clock to use devm_platform_get_and_ioremap_resource()
- Fix function name in a comment in ccu_mmc_timing.c
* tag 'sunxi-clk-for-6.6-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: Modify mismatched function name
clk: sunxi: sun9i-mmc: Use devm_platform_get_and_ioremap_resource()
* dt-bindings: expose all clock ids
* Migrate gxbb clock controllers dt-bindings to schema
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Merge tag 'clk-meson-v6.6-1' of https://github.com/BayLibre/clk-meson into clk-amlogic
Pull Amlogic clk driver updates from Jerome Brunet:
- dt-bindings: expose all Amlogic clock ids
- Migrate Amlogic gxbb clock controllers dt-bindings to schema
* tag 'clk-meson-v6.6-1' of https://github.com/BayLibre/clk-meson: (22 commits)
dt-bindings: soc: amlogic: document System Control registers
dt-bindings: clock: amlogic: convert amlogic,gxbb-aoclkc.txt to dt-schema
dt-bindings: clock: amlogic: convert amlogic,gxbb-clkc.txt to dt-schema
clk: meson: axg-audio: move bindings include to main driver
clk: meson: meson8b: move bindings include to main driver
clk: meson: a1: move bindings include to main driver
clk: meson: eeclk: move bindings include to main driver
clk: meson: aoclk: move bindings include to main driver
dt-bindings: clk: axg-audio-clkc: expose all clock ids
dt-bindings: clk: amlogic,a1-pll-clkc: expose all clock ids
dt-bindings: clk: amlogic,a1-peripherals-clkc: expose all clock ids
dt-bindings: clk: meson8b-clkc: expose all clock ids
dt-bindings: clk: g12a-aoclkc: expose all clock ids
dt-bindings: clk: g12a-clks: expose all clock ids
dt-bindings: clk: axg-clkc: expose all clock ids
dt-bindings: clk: gxbb-clkc: expose all clock ids
clk: meson: migrate axg-audio out of hw_onecell_data to drop NR_CLKS
clk: meson: migrate meson8b out of hw_onecell_data to drop NR_CLKS
clk: meson: migrate a1 clock drivers out of hw_onecell_data to drop NR_CLKS
clk: meson: migrate meson-aoclk out of hw_onecell_data to drop NR_CLKS
...
Similar to ccu_mp, if the current parent rate allows getting the ideal
rate, prefer to not change the parent clock's rate.
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-11-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Selecting the closest rate for pll-video0 instead of the closest rate
that is less than the requested rate has no downside for this clock,
while allowing for selecting a more suitable rate, e.g. for the
connected panels.
Furthermore, the algorithm that sets an NKM clock's parent benefits from
the closest rate. Without it, the NKM clock's rate might drift away from
the requested rate in the multiple successive calls to
ccu_nkm_determine_rate that the clk framework performs when setting a
clock rate.
Therefore, configure pll-video0 and, in consequence, all of its
descendents to select the closest rate.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-10-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Add initalization macros for divisor clocks with mux
(SUNXI_CCU_M_WITH_MUX) to support finding the closest rate. This clock
type requires the appropriate flags to be set in the .common structure
(for the mux part of the clock) and the .div part.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-9-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
When finding the best rate for a mux clock, consider rates that are
higher than the requested rate when CCU_FEATURE_ROUND_CLOSEST is used.
Furthermore, introduce an initialization macro that sets this flag.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-8-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
When finding the best rate for a NKM clock, consider rates that are
higher than the requested rate, if the CCU_FEATURE_CLOSEST_RATE flag is
set by using the helper function ccu_is_better_rate().
Accommodate ccu_mux_helper_determine_rate to this change.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-7-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Use the helper function ccu_is_better_rate() to determine the rate that
is closest to the requested rate, thereby supporting rates that are
higher than the requested rate if the clock uses the
CCU_FEATURE_CLOSEST_RATE.
Add the macro SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_CLOSEST which
sets CCU_FEATURE_CLOSEST_RATE.
To avoid code duplication, add the macros
SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_FEAT that allows selecting
arbitrary features and use it in the original
SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX as well as the newly introduced
SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX_CLOSEST macros.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-6-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The default behaviour of clocks in the sunxi-ng driver is to select a
clock rate that is closest to but less than the requested rate.
Add the ccu_is_better_rate() helper function that - depending on the
fact if thc CCU_FEATURE_CLOSEST_RATE flag is set - decides if a rate is
closer than another rate.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-5-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The default behaviour of clocks in the sunxi-ng driver is to select a
clock rate that is closest to but less than the requested rate.
Add the CCU_FEATURE_CLOSEST_RATE flag, which can be used to allow clocks
to find the closest rate instead.
Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-4-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The nkm clock now supports setting the parent's rate. Utilize this
option to find the optimal rate for pll-mipi.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-3-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
In case the CLK_SET_RATE_PARENT flag is set, consider using a different
parent rate when determining a new rate.
To find the best match for the requested rate, perform the following
steps for each NKM combination:
- calculate the optimal parent rate,
- find the best parent rate that the parent clock actually supports
- use that parent rate to calculate the effective rate.
In case the clk does not support setting the parent rate, use the same
algorithm as before.
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-2-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ccu_nkm_round_rate() takes a clk_hw as parameter "hw". Since "hw" is the
nkm clock's parent clk_hw, not the clk_hw of the nkm clock itself,
change the parameter name to "parent_hw" to make it more clear what
we're dealing with.
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Link: https://lore.kernel.org/r/20230807-pll-mipi_set_rate_parent-v6-1-f173239a4b59@oltmanns.dev
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Document the System Control registers regions found on all Amlogic
SoC families and it's clock, power, pinctrl and phy subnodes.
The regions has various independent registers tied to other
hardware devices, thus the syscon compatible.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230706-b4-amlogic-bindings-convert-take2-v3-3-f63de6f12dcc@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
