Commit Graph

1129989 Commits

Author SHA1 Message Date
qctecmdr
02ce5d8db3 Merge "ufs-host: qcom: Disable h8 with clk gate and scale" 2022-11-10 08:58:50 -08:00
qctecmdr
da644b5622 Merge "soc: llcc: qcom: Update config data for pineapple SoC" 2022-11-10 08:58:49 -08:00
qctecmdr
2c5bffcdb3 Merge "usb: phy: Remove delay from QMP phy init sequence" 2022-11-10 08:58:47 -08:00
qctecmdr
7bb4b80d6e Merge "pinctrl: qcom: Update driver to match TLMM data" 2022-11-10 08:58:45 -08:00
qctecmdr
755b0b2bfb Merge "scsi: ufs: ufs-qcom: Correct the REG_UFS_CFG0 setting for pineapple" 2022-11-10 08:58:43 -08:00
qctecmdr
34dec33a6e Merge "modules.list.msm.pineapple: Add UFS PHY module for pineapple" 2022-11-10 08:58:42 -08:00
Asutosh Das
8c74b78d69 ufs-host: qcom: Disable h8 with clk gate and scale
Work-around for hangs during bootup.
No ramdumps/tools available to debug during BU.
So, disable hibern8 during clock gating.
This would let the clocks to be off thus allowing CxPC.

Clock scaling needs SYS1CLK_1US_REG and
DME_VS_CORE_CLK_CTRL.MAX_CORE_CLK_1US_CYCLES and
PA_VS_CORE_CLK_40NS_CYCLES to be defined for 403Mhz.
Disable clock scaling until values are determined.

Change-Id: I702a561ecce627a8b00a676fc2e6118ce1ebc4a0
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
2022-11-08 15:39:05 -08:00
John Moon
87e3484a2c build.config: Fixing legacy dtc build
When building with legacy build.sh, the host dtc tools are not
generated due to a faulty logic check.

Fix the logic check and make the build environment explicit.

Change-Id: Id4f58fd812f3135379f47a22025f3030ecf68b58
Signed-off-by: John Moon <quic_johmoo@quicinc.com>
2022-11-07 16:52:34 -08:00
qctecmdr
4579ad4b9d Merge "uio: Kconfig: Make the msm shared memory driver as module" 2022-11-07 14:38:27 -08:00
Guru Das Srinagesh
72f329c57d soc: llcc: qcom: Update config data for pineapple SoC
Update pineapple config data to bring it in line with latest HW updates.

Change-Id: I99fb80af935eb8b348da41dd5c3b503c08fa6615
Signed-off-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
2022-11-06 15:42:07 -08:00
John Moon
f54a3ef5e7 pinctrl: qcom: Update driver to match TLMM data
Update the driver to match the data TLMM block data on pineapple SoC.

Change-Id: Ifd86ab32f6490b4e3fef379e28d716a555504211
Signed-off-by: John Moon <quic_johmoo@quicinc.com>
2022-11-06 11:21:10 -08:00
Prashanth K
3eb7255b79 usb: phy: Remove delay from QMP phy init sequence
Remove delay from QMP phy initialisation sequence. Its
not required in USB QMP DP/UNI phys as they use SE clk.

Change-Id: I6d22bd9c2f870b94bee49db65e057df1ab2acb44
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
2022-11-04 16:12:44 -07:00
Bao D. Nguyen
fcfc5902c3 scsi: ufs: ufs-qcom: Correct the REG_UFS_CFG0 setting for pineapple
Correctly configure the REG_UFS_CFG0 register for supporting
UFS4.0 devices on pineapple platforms.

Change-Id: If2edfb4d939a15d08bcdc2150e4badd086bc7ccf
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2022-11-04 14:55:45 -07:00
Bao D. Nguyen
91270dbb7a scsi: ufs-qcom: Add support for UFS device version detection
The bootloader software is aware of the type of UFS device populated
on the board. It passes this information through a UFS's controller
spare register.
Retrieve the UFS device type information passed from the
bootloader. Together with the Device Tree settings for the UFS's
rate and PHY's submode, configure the UFS PHY properly to work
with different types of UFS device populated on the board.

Change-Id: Ide107ef87405fb9c8c30f6ada67613bc44ef28e8
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2022-11-04 14:55:34 -07:00
qctecmdr
6b336c3191 Merge "dt-bindings: Added COMPUTE_L0 SSR signal for IPCLite" 2022-11-04 14:45:02 -07:00
qctecmdr
91808785bc Merge "defconfig:Add vm tlmm related and other configs for kkp" 2022-11-04 13:53:11 -07:00
qctecmdr
9cf78134b8 Merge "defconfig: Enable pineapple vm pinctrl" 2022-11-04 13:53:11 -07:00
qctecmdr
401f6c5e20 Merge "modules.list.msm.pineapple: Add sdhci-msm and cqhci modules" 2022-11-04 13:53:10 -07:00
qctecmdr
67bd5a23c8 Merge "arm64: defconfig: Enable USB GSI function driver" 2022-11-04 13:53:10 -07:00
qctecmdr
7790ea68bd Merge "net: qrtr: log rx packet causing system wakeup" 2022-11-04 13:53:10 -07:00
qctecmdr
08b524823c Merge "dt-bindings: Added COMPUTE_L0 signals & broadcast client" 2022-11-04 09:00:38 -07:00
qctecmdr
ccc3244aaf Merge "phy: phy-qcom-ufs: Update min phy voltage limit per spec" 2022-11-04 09:00:38 -07:00
qctecmdr
ba9065b642 Merge "pinctrl: qcom: Allow setting wakeup enable bit" 2022-11-04 09:00:37 -07:00
qctecmdr
bede146f94 Merge "coresight-cti: Add gpio trigin and trigout support" 2022-11-04 09:00:37 -07:00
qctecmdr
f6668c1977 Merge "clk: qcom: gdsc-regulator: Increase default GDSC timeout to 1500us" 2022-11-04 09:00:35 -07:00
qctecmdr
4db4031c57 Merge "ANDROID: enable pineapple kleaf build" 2022-11-04 09:00:35 -07:00
qctecmdr
7b28f02de3 Merge "soc: qcom: Add tmecom, hwkm and ice driver" 2022-11-04 09:00:34 -07:00
qctecmdr
3b734dc9b5 Merge "defconfig: msm: enable remote debugger driver" 2022-11-04 09:00:33 -07:00
Richard Patrick
66c74d3f53 uio: Kconfig: Make the msm shared memory driver as module
Make the msm shared memory driver as a dynamic module instead of static.

Change-Id: I19ae80e8e700b77ff03f05a3b879755440572e76
Signed-off-by: Richard Patrick <quic_richardp@quicinc.com>
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
2022-11-04 18:10:58 +05:30
Sridhar Arra
ebfd95c59c uio: msm_sharedmem: shared memory region access is also given to vm-nav
If vm-nav-path dtsi property is set, then the shared memory region will
be given access to vm-nav-path also.

Change-Id: I0aef894dbee78c2e3d7d67f61a238a889050037a
Signed-off-by: Sridhar Arra <sarra@codeaurora.org>
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Richard Patrick <quic_richardp@quicinc.com>
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
2022-11-04 18:08:32 +05:30
Sahitya Tummala
8251ad9787 uio: msm_sharedmem: add guard page around shared memory
If guard_memory dtsi property is set, then the shared memory
region will be guarded by SZ_4K at the start and at the end.
This is needed to overcome the XPU limitation on few MSM HW,
so as to make this memory not contiguous with other allocations
that may possibly happen from other clients in the system.

Change-Id: I57637619cea8fe7f0f7254624e07177ea4a4fce0
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Richard Patrick <quic_richardp@quicinc.com>
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
2022-11-04 18:00:02 +05:30
Bao D. Nguyen
acd1ae3ad8 modules.list.msm.pineapple: Add UFS PHY module for pineapple
Add UFS PHY module in modules.list.msm.pineapple so that the module
is loaded automatically from the first stage RAM disk
image during Linux kernel boot up.

Change-Id: I29b9be8ebeec3f0e4d16f1b13203363eb4c1dd2b
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2022-11-03 23:14:15 -07:00
Bao D. Nguyen
0ea97dab54 defconfig: pineapple-gki: Enable UFS PHY driver
Enable the UFS PHY driver build option.

Change-Id: I3ccd5aa800cb1153eceed89830a737de8e9451ea
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2022-11-03 23:13:09 -07:00
Viraj Mandlekar
87fd4c483f dt-bindings: Added COMPUTE_L0 SSR signal for IPCLite
These changes enable IPCC_COMPUTE_L0 SSR signal.
This will be used by IPCLite to send SSR signals to
remote subsystems over compute_l0 interrupt line.

Change-Id: Ic8ac4d332a1386081b7f766f07c9fd0fa8a21498
Signed-off-by: Viraj Mandlekar <quic_vmandlek@quicinc.com>
2022-11-04 11:05:29 +05:30
Nikhilesh Reddy
75c388e04f uio: msm_sharedmem: Fix format specifier to print resource_size_t
Use proper printk format specifier %pa to print resource_size_t
type variable.

Change-Id: I77b1f3ded0957d4a572c5c05996a3649a9b1fb45
Signed-off-by: Nikhilesh Reddy <reddyn@codeaurora.org>
[riteshh@codeaurora.org: fixed trivial merge conflicts]
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Ankit Jain <jankit@codeaurora.org>
Signed-off-by: Richard Patrick <richardp@codeaurora.org>
Signed-off-by: Richard Patrick <quic_richardp@quicinc.com>
Signed-off-by: Sayali Lokhande <quic_sayalil@quicinc.com>
2022-11-03 22:43:26 +05:30
Devender Kaushik
d528d9ae43 defconfig: msm: enable remote debugger driver
Add remote debugger device configuration. The Remote Debugger driver
allows a debugger running on a host PC to communicate with a remote
stub running on peripheral subsystems.

Change-Id: Ib3faed59b8f54213341aa52248e33091fffea061
Signed-off-by: Devender Kaushik <quic_dkaushik@quicinc.com>
2022-11-02 23:29:08 -07:00
qctecmdr
0be12ba8de Merge "ion: Add ION UAPI headers" 2022-11-02 21:55:04 -07:00
qctecmdr
622df386b4 Merge "driver: thermal: qcom: Add snapshot of bcl driver" 2022-11-02 21:55:04 -07:00
qctecmdr
98d3d52740 Merge "coresight-tmc: Ignore USB write errors during disconnection" 2022-11-02 21:55:03 -07:00
qctecmdr
11f3d1bab4 Merge "defconfig: pineapple-gki: Enable QCOM_EUD driver" 2022-11-02 21:55:03 -07:00
qctecmdr
d4434ee0a3 Merge "soc: qcom: llcc: Introduce APIs to support staling mode" 2022-11-02 21:55:02 -07:00
qctecmdr
749d60cba7 Merge "sched/walt: append carriage return to not_preferred output" 2022-11-02 21:55:02 -07:00
qctecmdr
010a200ec4 Merge "sched/walt: expand cpu arrays" 2022-11-02 21:55:02 -07:00
qctecmdr
e618ed7298 Merge "clk: qcom: clk-debug: Fix accessing mux when it is NULL" 2022-11-02 21:55:01 -07:00
qctecmdr
c4eeb0bb7d Merge "build: Add support for custom userspace toolchain" 2022-11-02 21:55:01 -07:00
qctecmdr
0d93c59727 Merge "defconfig: Enable MHI bus driver for msm-pineapple" 2022-11-02 21:55:01 -07:00
qctecmdr
ebd3b76455 Merge "kernel/sched/walt: ensure em_pd creation before rebuild_sched_domains" 2022-11-02 21:55:01 -07:00
qctecmdr
0a87ecd6c9 Merge "clk: qcom: clk-rpmh: Fix overflow in BCM vote" 2022-11-02 21:55:00 -07:00
qctecmdr
60d2b5697e Merge "coresight: funnel: Fix the duplicate-funnel enable crash issue" 2022-11-02 21:54:59 -07:00
smaniar
e5641b8084 dt-bindings: Added COMPUTE_L0 signals & broadcast client
These changes enable IPCC_COMPUTE_L0 signals and
broadcast client. These will be used by the new IPCLite
communication protocol to communicate with
remote subsystems over compute_l0 interrupt line.

Change-Id: I7aac6f121c53136b8cc19f1d1e166ccc2d59caee
Signed-off-by: smaniar <smaniar@codeaurora.org>
2022-11-02 10:02:33 -07:00