Commit Graph

6 Commits

Author SHA1 Message Date
Georgi Djakov
086502e935 Merge branch 'icc-mahua' into icc-next
Mahua is a derivative of the Glymur SoC and shares a significant
portion of its interconnect topology with Glymur. As such, this
series extends the existing Glymur interconnect driver to support
Mahua, reusing common definitions where possible and adding
SoC-specific configurations where necessary.

* icc-mahua
  dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in Mahua SoC
  interconnect: qcom: glymur: Add Mahua SoC support

Link: https://msgid.link/20260209-mahua_icc-v3-0-c65f3dfd72c8@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06 14:38:48 +02:00
Krzysztof Kozlowski
26078bbdad interconnect: qcom: De-acronymize SoC names
Glymur and Kaanapali are codenames of Qualcomm SoCs, not acronyms.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://msgid.link/20260217130035.281752-4-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06 14:24:30 +02:00
Raviteja Laggyshetty
dfff14a4a4 interconnect: qcom: glymur: Add Mahua SoC support
Mahua is a derivative of the Glymur SoC. Extend the
Glymur driver to support Mahua by:

  1. Adding new node definitions for interconnects that differ from Glymur
     (Config NoC, High-Speed Coherent NoC, PCIe West ANOC/Slave NoC).
  2. Reusing existing Glymur definitions for identical NoCs.
  3. Overriding the channel and buswidth, with Mahua specific values for
     the differing NoCs

Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Link: https://msgid.link/20260209-mahua_icc-v3-2-c65f3dfd72c8@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-03-06 13:57:24 +02:00
Dmitry Baryshkov
ed7a388695 interconnect: qcom: icc-rpmh: drop support for non-dynamic IDS
Now as all RPMh interconnect drivers were converted to using the dynamic
IDs, drop support for non-dynamic ID allocation.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251031-rework-icc-v3-25-0575304c9624@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02 23:20:18 +02:00
Dmitry Baryshkov
fb6f1aaeb4 interconnect: qcom: icc-rpmh: convert link_nodes to dynamic array
Declaring link_nodes as a double-pointer results in a syntax sugar in
the interconnect driver to typecast the array. Change the type of
link_nodes field to the array to remove the need for the extra typecast.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251031-rework-icc-v3-1-0575304c9624@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-11-02 23:15:30 +02:00
Raviteja Laggyshetty
5c5f222182 interconnect: qcom: add glymur interconnect provider driver
Add driver for the Qualcomm interconnect buses found in glymur
based platforms. The topology consists of several NoCs that are
controlled by a remote processor that collects the aggregated
bandwidth for each master-slave pairs.

Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250814-glymur-icc-v2-3-596cca6b6015@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-08-18 13:43:18 +03:00