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17 Commits

Author SHA1 Message Date
Linus Torvalds
4a57e0913e drm for v7.1-rc1 
mm:
 - two pass MMU interval notifiers
 - add gpu active/reclaim per-node stat counters
 
 math:
 - provide __KERNEL_DIV_ROUND_CLOSEST() in UAPI
 - implement DIV_ROUND_CLOSEST() with __KERNEL_DIV_ROUND_CLOSEST()
 
 rust:
 - shared tag with driver-core: register macro and io infra
 - core: rework DMA coherent API
 - core: add interop::list to interop with C linked lists
 - core: add more num::Bounded operations
 - core: enable generic_arg_infer and add EMSGSIZE
 - workqueue: add ARef<T> support for work and delayed work
 - add GPU buddy allocator abstraction
 - add DRM shmem GEM helper abstraction
 - allow drm:::Device to dispatch work and delayed work items
   to driver private data
 - add dma_resv_lock helper and raw accessors
 
 core:
 - introduce DRM RAS infrastructure over netlink
 - add connector panel_type property
 - fourcc: add ARM interleaved 64k modifier
 - colorop: add destroy helper
 - suballoc: split into alloc and init helpers
 - mode: provide DRM_ARGB_GET*() macros for reading color components
 
 edid:
 - provide drm_output_color_Format
 
 dma-buf:
 - provide revoke mechanism for shared buffers
 - rename move_notify to invalidate_mappings
 - always enable move_notify
 - protect dma_fence_ops with RCU and improve locking
 - clean pages with helpers
 
 atomic:
 - allocate drm_private_state via callback
 - helper: use system_percpu_wq
 
 buddy:
 - make buddy allocator available to gpu level
 - add kernel-doc for buddy allocator
 - improve aligned allocation
 
 ttm:
 - fix fence signalling
 - improve tests and docs
 - improve handling of gfp_retry_mayfail
 - use per-node stat counters to track memory allocations
 - port pool to use list_lru
 - drop NUMA specific pools
 - make pool shrinker numa aware
 - track allocated pages per numa node
 
 coreboot:
 - cleanup coreboot framebuffer support
 
 sched:
 - fix race condition in drm_sched_fini
 
 pagemap:
 - enable THP support
 - pass pagemap_addr by reference
 
 gem-shmem:
 - Track page accessed/dirty status across mmap/vmap
 
 gpusvm:
 - reenable device to device migration
 - fix unbalanced unclock
 
 bridge:
 - anx7625: Support USB-C plus DT bindings
 - connector: Fix EDID detection
 - dw-hdmi-qp: Support Vendor-Specfic and SDP Infoframes; improve others
 - fsl-ldb: Fix visual artifacts plus related DT property 'enable-termination-resistor'
 - imx8qxp-pixel-link: Improve bridge reference handling
 - lt9611: Support Port-B-only input plus DT bindings
 - tda998x: Support DRM_BRIDGE_ATTACH_NO_CONNECTOR; Clean up
 - Support TH1520 HDMI plus DT bindings
 - waveshare-dsi: Fix register and attach; Support 1..4 DSI lanes plus DT bindings
 - anx7625: Fix USB Type-C handling
 - cdns-mhdp8546-core: Handle HDCP state in bridge atomic_check
 - Support Lontium LT8713SX DP MST bridge plus DT bindings
 - analogix_dp: Use DP helpers for link training
 
 panel:
 - panel-jdi-lt070me05000: Use mipi-dsi multi functions
 - panel-edp: Support Add AUO B116XAT04.1 (HW: 1A); Support CMN N116BCL-EAK (C2); Support FriendlyELEC plus DT changes
 - panel-edp: Fix timings for BOE NV140WUM-N64
 - ilitek-ili9882t: Allow GPIO calls to sleep
 - jadard: Support TAIGUAN XTI05101-01A
 - lxd: Support LXD M9189A plus DT bindings
 - mantix: Fix pixel clock; Clean up
 - motorola: Support Motorola Atrix 4G and Droid X2 plus DT bindings
 - novatek: Support Novatek/Tianma NT37700F plus DT bindings
 - simple: Support EDT ET057023UDBA plus DT bindings; Support Powertip
   PH800480T032-ZHC19 plus DT bindings; Support Waveshare 13.3"
 - novatek-nt36672a: Use mipi_dsi_*_multi() functions
 - panel-edp: Support BOE NV153WUM-N42, CMN N153JCA-ELK, CSW MNF307QS3-2
 - support Himax HX83121A plus DT bindings
 - support JuTouch JT070TM041 plus DT bindings
 - support Samsung S6E8FC0 plus DT bindings
 - himax-hx83102c: support Samsung S6E8FC0 plus DT bindings; support backlight
 - ili9806e: support Rocktech RK050HR345-CT106A plus DT bindings
 - simple: support Tianma TM050RDH03 plus DT bindings
 
 amdgpu:
 - enable DC by default on CIK APUs
 - userq fence ioctl param size fixes
 - set panel_type to OLED for eDP
 - refactor DC i2c code
 - FAMS2 update
 - rework ttm handling to allow multiple engines
 - DC DCE 6.x cleanup
 - DC support for NUTMEG/TRAVIS DP bridge
 - DCN 4.2 support
 - GC12 idle power fix for compute
 - use struct drm_edid in non-DC code
 - enable NV12/P010 support on primary planes
 - support newer IP discovery tables
 - VCN/JPEG 5.0.2 support
 - GC/MES 12.1 updates
 - USERQ fixes
 - add DC idle state manager
 - eDP DSC seamless boot
 
 amdkfd:
 - GC 12.1 updates
 - non 4K page fixes
 
 xe:
 - basic Xe3p_LPG and NVL-P enabling patches
 - allow VM_BIND decompress support
 - add purgeable buffer object support
 - add xe_vm_get_property_ioctl
 - restrict multi-lrc to VCS/VECS engines
 - allow disabling VM overcommit in fault mode
 - dGPU memory optimizations
 - Workaround cleanups and simplification
 - Allow VFs VRAM quote changes using sysfs
 - convert GT stats to per-cpu counters
 - pagefault refactors
 - enable multi-queue on xe3p_xpc
 - disable DCC on PTL
 - make MMIO communication more robust
 - disable D3Cold for BMG on specific platforms
 - vfio: improve FLR sync for Xe VFIO
 
 i915/display:
 - C10/C20/LT PHY PLL divider verification
 - use trans push mechanism to generate PSR frame change on LNL+
 - refactor DP DSC slice config
 - VGA decode refactoring
 - refactor DPT, gen2-4 overlay, masked field register macro helpers
 - refactor stolen memory allocation decisions
 - prepare for UHBR DP tunnels
 - refactor LT PHY PLL to use DPLL framework
 - implement register polling/waiting in display code
 - add shared stepping header between i915 and display
 
 i915:
 - fix potential overflow of shmem scatterlist length
 
 nouveau:
 - provide Z cull info to userspace
 - initial GA100 support
 - shutdown on PCI device shutdown
 
 nova-core:
 - harden GSP command queue
 - add support for large RPCs
 - simplify GSP sequencer and message handling
 - refactor falcon firmware handling
 - convert to new register macro
 - conver to new DMA coherent API
 - use checked arithmetic
 - add debugfs support for gsp-rm log buffers
 - fix aux device registration for multi-GPU
 
 msm:
 - CI:
   - Uprev mesa
   - Restore CI jobs for Qualcomm APQ8016 and APQ8096 devices
 - Core:
   - Switched to of_get_available_child_by_name()
 - DPU:
   - Fixes for DSC panels
   - Fixed brownout because of the frequency / OPP mismatch
   - Quad pipe preparation (not enabled yet)
   - Switched to virtual planes by default
   - Dropped VBIF_NRT support
   - Added support for Eliza platform
   - Reworked alpha handling
   - Switched to correct CWB definitions on Eliza
   - Dropped dummy INTF_0 on MSM8953
   - Corrected INTFs related to DP-MST
 - DP:
   - Removed debug prints looking into PHY internals
 - DSI:
   - Fixes for DSC panels
   - RGB101010 support
   - Support for SC8280XP
   - Moved PHY bindings from display/ to phy/
 - GPU:
   - Preemption support for x2-85 and a840
   - IFPC support for a840
   - SKU detection support for x2-85 and a840
   - Expose AQE support (VK ray-pipeline)
   - Avoid locking in VM_BIND fence signaling path
   - Fix to avoid reclaim in GPU snapshot path
   - Disallow foreign mapping of _NO_SHARE BOs
 - HDMI:
   - Fixed infoframes programming
 - MDP5:
   - Dropped support for MSM8974v1
   - Dropped now unused code for MSM8974 v1 and SDM660 / MSM8998
 
 panthor:
 - add tracepoints for power and IRQs
 - fix fence handling
 - extend timestamp query with flags
 - support various sources for timestamp queries
 
 tyr:
 - fix names and model/versions
 
 rockchip:
 - vop2: use drm logging function
 - rk3576 displayport support
 - support CRTC background color
 
 atmel-hlcdc:
 - support sana5d65 LCD controller
 
 tilcdc:
 - use DT bindings schema
 - use managed DRM interfaces
 - support DRM_BRIDGE_ATTACH_NO_CONNECTOR
 
 verisilicon:
 - support DC8200 + DT bindings
 
 virtgpu:
 - support PRIME import with 3D enabled
 
 komeda:
 - fix integer overflow in AFBC checks
 
 mcde:
 - improve bridge handling
 
 gma500:
 - use drm client buffer for fbdev framebuffer
 
 amdxdna:
 - add sensors ioctls
 - provide NPU power estimate
 - support column utilization sensor
 - allow forcing DMA through IOMMU IOVA
 - support per-BO mem usage queries
 - refactor GEM implementation
 
 ivpu:
 - update boot API to v3.29.4
 - limit per-user number of doorbells/contexts
 - perform engine reset on TDR error
 
 loongson:
 - replace custom code with drm_gem_ttm_dumb_map_offset()
 
 imx:
 - support planes behind the primary plane
 - fix bus-format selection
 
 vkms:
 - support CRTC background color
 
 v3d:
 - improve handling of struct v3d_stats
 
 komeda:
 - support Arm China Linlon D6 plus DT bindings
 
 imagination:
 - improve power-off sequence
 - support context-reset notification from firmware
 
 mediatek:
 - mtk_dsi: enable hs clock during pre-enable
 - Remove all conflicting aperture devices during probe
 - Add support for mt8167 display blocks
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Merge tag 'drm-next-2026-04-15' of https://gitlab.freedesktop.org/drm/kernel

Pull drm updates from Dave Airlie:
 "Highlights:
   - new DRM RAS infrastructure using netlink
   - amdgpu: enable DC on CIK APUs, and more IP enablement, and more
     user queue work
   - xe: purgeable BO support, and new hw enablement
   - dma-buf : add revocable operations

  Full summary:

  mm:
   - two-pass MMU interval notifiers
   - add gpu active/reclaim per-node stat counters

  math:
   - provide __KERNEL_DIV_ROUND_CLOSEST() in UAPI
   - implement DIV_ROUND_CLOSEST() with __KERNEL_DIV_ROUND_CLOSEST()

  rust:
   - shared tag with driver-core: register macro and io infra
   - core: rework DMA coherent API
   - core: add interop::list to interop with C linked lists
   - core: add more num::Bounded operations
   - core: enable generic_arg_infer and add EMSGSIZE
   - workqueue: add ARef<T> support for work and delayed work
   - add GPU buddy allocator abstraction
   - add DRM shmem GEM helper abstraction
   - allow drm:::Device to dispatch work and delayed work items
     to driver private data
   - add dma_resv_lock helper and raw accessors

  core:
   - introduce DRM RAS infrastructure over netlink
   - add connector panel_type property
   - fourcc: add ARM interleaved 64k modifier
   - colorop: add destroy helper
   - suballoc: split into alloc and init helpers
   - mode: provide DRM_ARGB_GET*() macros for reading color components

  edid:
   - provide drm_output_color_Format

  dma-buf:
   - provide revoke mechanism for shared buffers
   - rename move_notify to invalidate_mappings
   - always enable move_notify
   - protect dma_fence_ops with RCU and improve locking
   - clean pages with helpers

  atomic:
   - allocate drm_private_state via callback
   - helper: use system_percpu_wq

  buddy:
   - make buddy allocator available to gpu level
   - add kernel-doc for buddy allocator
   - improve aligned allocation

  ttm:
   - fix fence signalling
   - improve tests and docs
   - improve handling of gfp_retry_mayfail
   - use per-node stat counters to track memory allocations
   - port pool to use list_lru
   - drop NUMA specific pools
   - make pool shrinker numa aware
   - track allocated pages per numa node

  coreboot:
   - cleanup coreboot framebuffer support

  sched:
   - fix race condition in drm_sched_fini

  pagemap:
   - enable THP support
   - pass pagemap_addr by reference

  gem-shmem:
   - Track page accessed/dirty status across mmap/vmap

  gpusvm:
   - reenable device to device migration
   - fix unbalanced unclock

  bridge:
   - anx7625: Support USB-C plus DT bindings
   - connector: Fix EDID detection
   - dw-hdmi-qp: Support Vendor-Specfic and SDP Infoframes; improve
     others
   - fsl-ldb: Fix visual artifacts plus related DT property
     'enable-termination-resistor'
   - imx8qxp-pixel-link: Improve bridge reference handling
   - lt9611: Support Port-B-only input plus DT bindings
   - tda998x: Support DRM_BRIDGE_ATTACH_NO_CONNECTOR; Clean up
   - Support TH1520 HDMI plus DT bindings
   - waveshare-dsi: Fix register and attach; Support 1..4 DSI lanes plus
     DT bindings
   - anx7625: Fix USB Type-C handling
   - cdns-mhdp8546-core: Handle HDCP state in bridge atomic_check
   - Support Lontium LT8713SX DP MST bridge plus DT bindings
   - analogix_dp: Use DP helpers for link training

  panel:
   - panel-jdi-lt070me05000: Use mipi-dsi multi functions
   - panel-edp: Support Add AUO B116XAT04.1 (HW: 1A); Support CMN
     N116BCL-EAK (C2); Support FriendlyELEC plus DT changes
   - panel-edp: Fix timings for BOE NV140WUM-N64
   - ilitek-ili9882t: Allow GPIO calls to sleep
   - jadard: Support TAIGUAN XTI05101-01A
   - lxd: Support LXD M9189A plus DT bindings
   - mantix: Fix pixel clock; Clean up
   - motorola: Support Motorola Atrix 4G and Droid X2 plus DT bindings
   - novatek: Support Novatek/Tianma NT37700F plus DT bindings
   - simple: Support EDT ET057023UDBA plus DT bindings; Support Powertip
     PH800480T032-ZHC19 plus DT bindings; Support Waveshare 13.3"
   - novatek-nt36672a: Use mipi_dsi_*_multi() functions
   - panel-edp: Support BOE NV153WUM-N42, CMN N153JCA-ELK, CSW
     MNF307QS3-2
   - support Himax HX83121A plus DT bindings
   - support JuTouch JT070TM041 plus DT bindings
   - support Samsung S6E8FC0 plus DT bindings
   - himax-hx83102c: support Samsung S6E8FC0 plus DT bindings; support
     backlight
   - ili9806e: support Rocktech RK050HR345-CT106A plus DT bindings
   - simple: support Tianma TM050RDH03 plus DT bindings

  amdgpu:
   - enable DC by default on CIK APUs
   - userq fence ioctl param size fixes
   - set panel_type to OLED for eDP
   - refactor DC i2c code
   - FAMS2 update
   - rework ttm handling to allow multiple engines
   - DC DCE 6.x cleanup
   - DC support for NUTMEG/TRAVIS DP bridge
   - DCN 4.2 support
   - GC12 idle power fix for compute
   - use struct drm_edid in non-DC code
   - enable NV12/P010 support on primary planes
   - support newer IP discovery tables
   - VCN/JPEG 5.0.2 support
   - GC/MES 12.1 updates
   - USERQ fixes
   - add DC idle state manager
   - eDP DSC seamless boot

  amdkfd:
   - GC 12.1 updates
   - non 4K page fixes

  xe:
   - basic Xe3p_LPG and NVL-P enabling patches
   - allow VM_BIND decompress support
   - add purgeable buffer object support
   - add xe_vm_get_property_ioctl
   - restrict multi-lrc to VCS/VECS engines
   - allow disabling VM overcommit in fault mode
   - dGPU memory optimizations
   - Workaround cleanups and simplification
   - Allow VFs VRAM quote changes using sysfs
   - convert GT stats to per-cpu counters
   - pagefault refactors
   - enable multi-queue on xe3p_xpc
   - disable DCC on PTL
   - make MMIO communication more robust
   - disable D3Cold for BMG on specific platforms
   - vfio: improve FLR sync for Xe VFIO

  i915/display:
   - C10/C20/LT PHY PLL divider verification
   - use trans push mechanism to generate PSR frame change on LNL+
   - refactor DP DSC slice config
   - VGA decode refactoring
   - refactor DPT, gen2-4 overlay, masked field register macro helpers
   - refactor stolen memory allocation decisions
   - prepare for UHBR DP tunnels
   - refactor LT PHY PLL to use DPLL framework
   - implement register polling/waiting in display code
   - add shared stepping header between i915 and display

  i915:
   - fix potential overflow of shmem scatterlist length

  nouveau:
   - provide Z cull info to userspace
   - initial GA100 support
   - shutdown on PCI device shutdown

  nova-core:
   - harden GSP command queue
   - add support for large RPCs
   - simplify GSP sequencer and message handling
   - refactor falcon firmware handling
   - convert to new register macro
   - conver to new DMA coherent API
   - use checked arithmetic
   - add debugfs support for gsp-rm log buffers
   - fix aux device registration for multi-GPU

  msm:
   - CI:
      - Uprev mesa
      - Restore CI jobs for Qualcomm APQ8016 and APQ8096 devices
   - Core:
      - Switched to of_get_available_child_by_name()
   - DPU:
      - Fixes for DSC panels
      - Fixed brownout because of the frequency / OPP mismatch
      - Quad pipe preparation (not enabled yet)
      - Switched to virtual planes by default
      - Dropped VBIF_NRT support
      - Added support for Eliza platform
      - Reworked alpha handling
      - Switched to correct CWB definitions on Eliza
      - Dropped dummy INTF_0 on MSM8953
      - Corrected INTFs related to DP-MST
   - DP:
      - Removed debug prints looking into PHY internals
   - DSI:
      - Fixes for DSC panels
      - RGB101010 support
      - Support for SC8280XP
      - Moved PHY bindings from display/ to phy/
   - GPU:
      - Preemption support for x2-85 and a840
      - IFPC support for a840
      - SKU detection support for x2-85 and a840
      - Expose AQE support (VK ray-pipeline)
      - Avoid locking in VM_BIND fence signaling path
      - Fix to avoid reclaim in GPU snapshot path
      - Disallow foreign mapping of _NO_SHARE BOs
   - HDMI:
      - Fixed infoframes programming
   - MDP5:
      - Dropped support for MSM8974v1
      - Dropped now unused code for MSM8974 v1 and SDM660 / MSM8998

  panthor:
   - add tracepoints for power and IRQs
   - fix fence handling
   - extend timestamp query with flags
   - support various sources for timestamp queries

  tyr:
   - fix names and model/versions

  rockchip:
   - vop2: use drm logging function
   - rk3576 displayport support
   - support CRTC background color

  atmel-hlcdc:
   - support sana5d65 LCD controller

  tilcdc:
   - use DT bindings schema
   - use managed DRM interfaces
   - support DRM_BRIDGE_ATTACH_NO_CONNECTOR

  verisilicon:
   - support DC8200 + DT bindings

  virtgpu:
   - support PRIME import with 3D enabled

  komeda:
   - fix integer overflow in AFBC checks

  mcde:
   - improve bridge handling

  gma500:
   - use drm client buffer for fbdev framebuffer

  amdxdna:
   - add sensors ioctls
   - provide NPU power estimate
   - support column utilization sensor
   - allow forcing DMA through IOMMU IOVA
   - support per-BO mem usage queries
   - refactor GEM implementation

  ivpu:
   - update boot API to v3.29.4
   - limit per-user number of doorbells/contexts
   - perform engine reset on TDR error

  loongson:
   - replace custom code with drm_gem_ttm_dumb_map_offset()

  imx:
   - support planes behind the primary plane
   - fix bus-format selection

  vkms:
   - support CRTC background color

  v3d:
   - improve handling of struct v3d_stats

  komeda:
   - support Arm China Linlon D6 plus DT bindings

  imagination:
   - improve power-off sequence
   - support context-reset notification from firmware

  mediatek:
   - mtk_dsi: enable hs clock during pre-enable
   - Remove all conflicting aperture devices during probe
   - Add support for mt8167 display blocks"

* tag 'drm-next-2026-04-15' of https://gitlab.freedesktop.org/drm/kernel: (1735 commits)
  drm/ttm/tests: Remove checks from ttm_pool_free_no_dma_alloc
  drm/ttm/tests: fix lru_count ASSERT
  drm/vram: remove DRM_VRAM_MM_FILE_OPERATIONS from docs
  drm/fb-helper: Fix a locking bug in an error path
  dma-fence: correct kernel-doc function parameter @flags
  ttm/pool: track allocated_pages per numa node.
  ttm/pool: make pool shrinker NUMA aware (v2)
  ttm/pool: drop numa specific pools
  ttm/pool: port to list_lru. (v2)
  drm/ttm: use gpu mm stats to track gpu memory allocations. (v4)
  mm: add gpu active/reclaim per-node stat counters (v2)
  gpu: nova-core: fix missing colon in SEC2 boot debug message
  gpu: nova-core: vbios: use from_le_bytes() for PCI ROM header parsing
  gpu: nova-core: bitfield: fix broken Default implementation
  gpu: nova-core: falcon: pad firmware DMA object size to required block alignment
  gpu: nova-core: gsp: fix undefined behavior in command queue code
  drm/shmem_helper: Make sure PMD entries get the writeable upgrade
  accel/ivpu: Trigger recovery on TDR with OS scheduling
  drm/msm: Use of_get_available_child_by_name()
  dt-bindings: display/msm: move DSI PHY bindings to phy/ subdir
  ...
 2026-04-15 08:45:00 -07:00
Miguel Ojeda
341c51ee32 gpu: nova-core: bindings: remove unneeded cfg_attr 
These were likely copied from the `bindings` and `uapi` crates, but are
unneeded since there are no `cfg(test)`s in the bindings.

In addition, the issue that triggered the addition in those crates
originally is also fixed in `bindgen` (please see the previous commit).

Thus remove them.

Reviewed-by: Tamir Duberstein <tamird@kernel.org>
Reviewed-by: Gary Guo <gary@garyguo.net>
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20260405235309.418950-5-ojeda@kernel.org
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
 2026-04-07 09:51:39 +02:00
John Hubbard
a544873ce0 gpu: nova-core: apply the one "use" item per line policy to commands.rs 
As per [1], we need one "use" item per line, in order to reduce merge
conflicts. Furthermore, we need a trailing ", //" in order to tell
rustfmt(1) to leave it alone.

This does that for commands.rs, which is the only file in nova-core that
has any remaining instances of the old style.

[1] https://docs.kernel.org/rust/coding-guidelines.html#imports

Reviewed-by: Gary Guo <gary@garyguo.net>
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
Link: https://patch.msgid.link/20260310021125.117855-7-jhubbard@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
 2026-03-10 20:14:32 +09:00
Eliot Courtney
41584c7134 gpu: nova-core: gsp: add checking oversized commands 
The limit is 16 pages for a single command sent to the GSP. Return an
error if `allocate_command` is called with a too large size.

Tested-by: Zhi Wang <zhiw@nvidia.com>
Signed-off-by: Eliot Courtney <ecourtney@nvidia.com>
Link: https://patch.msgid.link/20260306-cmdq-continuation-v6-4-cc7b629200ee@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
 2026-03-10 16:07:33 +09:00
Alexandre Courbot
8e10d462e6 gpu: nova-core: gsp: derive Zeroable for GspStaticConfigInfo 
We can now derive `Zeroable` on tuple structs, so do this instead of
providing our own implementation.

Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20260217-nova-misc-v3-6-b4e2d45eafbc@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
 2026-02-25 08:17:04 +09:00
Alexandre Courbot
523317152c gpu: nova-core: bindings: derive MaybeZeroable 
Commit 4846300ba8 ("rust: derive `Zeroable` for all structs & unions
generated by bindgen where possible") automatically derives
`MaybeZeroable` for all bindings. This is better than selectively
deriving `Zeroable` as it ensures all types that can implement
`Zeroable` do.

Regenerate the nova-core bindings so they benefit from this, and remove
a now unneeded implementation of `Zeroable`.

Fixes: 75f6b1de81 ("gpu: nova-core: gsp: Add GSP command queue bindings and handling")
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20251216-nova-fixes-v3-3-c7469a71f7c4@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
 2025-12-16 22:04:25 +09:00
Alexandre Courbot
b6c7651823 gpu: nova-core: bindings: add missing explicit padding 
Explicit padding is needed in order to avoid uninitialized bytes and
safely implement `AsBytes`. The `--explicit-padding` of bindgen was
omitted by mistake when these bindings were generated.

Fixes: 13f85988d4 ("gpu: nova-core: gsp: Retrieve GSP static info to gather GPU information")
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20251216-nova-fixes-v3-1-c7469a71f7c4@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
 2025-12-16 21:59:40 +09:00
Alistair Popple
13f85988d4 gpu: nova-core: gsp: Retrieve GSP static info to gather GPU information 
After GSP initialization is complete, retrieve the static configuration
information from GSP-RM. This information includes GPU name, capabilities,
memory configuration, and other properties. On some GPU variants, it is
also required to do this for initialization to complete.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Co-developed-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
[acourbot@nvidia.com: properly abstract the command's bindings, add
relevant methods, make str_from_null_terminated return an Option, fix
size of GPU name array.]
Co-developed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251114195552.739371-14-joelagnelf@nvidia.com>
 2025-11-15 21:54:18 +09:00
Joel Fernandes
eaf0989c77 gpu: nova-core: Add bindings required by GSP sequencer 
Add several firmware bindings required by GSP sequencer code.

Co-developed-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Alistair Popple <apopple@nvidia.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
[acourbot@nvidia.com: remove a couple stray lines/unwanted comment
changes.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251114195552.739371-7-joelagnelf@nvidia.com>
 2025-11-15 20:35:50 +09:00
Alistair Popple
19b0a6e7c2 gpu: nova-core: gsp: Add SetRegistry command 
Add support for sending the SetRegistry command, which is critical to
GSP initialization.

The RM registry is serialized into a packed format and sent via the
command queue. For now only three parameters which are required to boot
GSP are hardcoded. In the future a kernel module parameter will be added
to enable other parameters to be added.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
[acourbot@nvidia.com: split into its own patch.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-12-8ae4058e3c0e@nvidia.com>
 2025-11-14 20:25:57 +09:00
Alistair Popple
edcb134264 gpu: nova-core: gsp: Add SetSystemInfo command 
Add support for sending the SetSystemInfo command, which provides
required hardware information to the GSP and is critical to its
initialization.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-11-8ae4058e3c0e@nvidia.com>
 2025-11-14 20:25:57 +09:00
Alistair Popple
75f6b1de81 gpu: nova-core: gsp: Add GSP command queue bindings and handling 
This commit introduces core infrastructure for handling GSP command and
message queues in the nova-core driver. The command queue system enables
bidirectional communication between the host driver and GSP firmware
through a remote message passing interface.

The interface is based on passing serialised data structures over a ring
buffer with separate transmit and receive queues. Commands are sent by
writing to the CPU transmit queue and waiting for completion via the
receive queue.

To ensure safety mutable or immutable (depending on whether it is a send
or receive operation) references are taken on the command queue when
allocating the message to write/read to. This ensures message memory
remains valid and the command queue can't be mutated whilst an operation
is in progress.

Currently this is only used by the probe() routine and therefore can
only used by a single thread of execution. Locking to enable safe access
from multiple threads will be introduced in a future series when that
becomes necessary.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Co-developed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-9-8ae4058e3c0e@nvidia.com>
 2025-11-14 20:25:57 +09:00
Alistair Popple
6b5a10dad5 gpu: nova-core: Add zeroable trait to bindings 
Derive the Zeroable trait for existing bindgen generated bindings. This
is safe because all bindgen generated types are simple integer types for
which any bit pattern, including all zeros, is valid.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-7-8ae4058e3c0e@nvidia.com>
 2025-11-14 20:25:56 +09:00
Alistair Popple
41235c40ed gpu: nova-core: gsp: Create wpr metadata 
The GSP requires some pieces of metadata to boot. These are passed in a
struct which the GSP transfers via DMA. Create this struct and get a
handle to it for future use when booting the GSP.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Co-developed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-5-8ae4058e3c0e@nvidia.com>
 2025-11-14 20:25:56 +09:00
Alistair Popple
f38b4f105c gpu: nova-core: Create initial Gsp 
The GSP requires several areas of memory to operate. Each of these have
their own simple embedded page tables. Set these up and map them for DMA
to/from GSP using CoherentAllocation's. Return the DMA handle describing
where each of these regions are for future use when booting GSP.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Co-developed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-4-8ae4058e3c0e@nvidia.com>
 2025-11-14 20:25:56 +09:00
Alexandre Courbot
7c01dc25f5 gpu: nova-core: compute layout of more framebuffer regions required for GSP 
Compute more of the required FB layout information to boot the GSP
firmware.

This information is dependent on the firmware itself, so first we need
to import and abstract the required firmware bindings in the `nvfw`
module.

Then, a new FB HAL method is introduced in `fb::hal` that uses these
bindings and hardware information to compute the correct layout
information.

This information is then used in `fb` and the result made visible in
`FbLayout`.

These 3 things are grouped into the same patch to avoid lots of unused
warnings that would be tedious to work around. As they happen in
different files, they should not be too difficult to track separately.

Acked-by: Danilo Krummrich <dakr@kernel.org>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251110-gsp_boot-v9-1-8ae4058e3c0e@nvidia.com>
 2025-11-14 11:05:58 +09:00
Alistair Popple
299eb32863 gpu: nova-core: Add base files for r570.144 firmware bindings 
Interacting with the GSP currently requires using definitions from C
header files. Rust definitions for the types needed for Nova core will
be generated using the Rust bindgen tool. This patch adds the base
module to allow inclusion of the generated bindings. The generated
bindings themselves are added by subsequent patches when they are first
used.

Currently we only intend to support a single firmware version, 570.144,
with these bindings. Longer term we intend to move to a more stable GSP
interface that isn't tied to specific firmware versions.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Reviewed-by: John Hubbard <jhubbard@nvidia.com>
[acourbot@nvidia.com: adapt the bindings module comment a bit]
Acked-by: Danilo Krummrich <dakr@kernel.org>
Link: https://lore.kernel.org/r/20250913-nova_firmware-v6-10-9007079548b0@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
 2025-09-13 23:17:48 +09:00