Commit Graph

7 Commits

Author SHA1 Message Date
Matthew Stewart
1a1751507e drm/amd: Add register header files for DCN42B
[Why & How]
Add register headers for:

- clk 15.0.5
- dcn 4.2.1
- dpcs 4.0.1
- nbio 7.15.5

v2: add in missing license (Alex)

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Matthew Stewart <Matthew.Stewart2@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-06-03 13:43:48 -04:00
Roman Li
5b880e37a8 drm/amd/display: Enable dcn42 DC clk_mgr
Add support for DCN 4.2 clock manager.

Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-11 13:58:06 -04:00
Alex Deucher
0a94608f0f drm/amdgpu: fix file permissions on some files
Drop execute.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2085
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-13 11:25:18 -04:00
Zhan Liu
0ad53fe3ae drm/amdgpu: add cyan_skillfish asic header files
This patch is to add cyan_skillfish asic header files.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-29 17:30:00 -04:00
Huang Rui
a5b2c10c05 drm/amdgpu: add vangogh asic header files (v2)
This patch is to add vangogh asic header files.

v2: squash in updates

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-05 15:14:02 -04:00
Bhawanpreet Lakha
b593bce59b drm/amd/display: Add Renoir registers (v3)
add registers for dcn, clk, and renoir ip offsets

v2: header cleanup (Alex)
v3: Add DPCS registers (Hersen)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
Hawking Zhang
ae213c4450 drm/amdgpu: add CLK 11.0 register headers
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-06-20 15:54:21 -05:00