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arm64: dts: imx943: Add pcie1 and pcie1-ep supports

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Add pcie1 and pcie1-ep supports.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Richard Zhu 2026-05-06 13:53:15 +08:00 committed by Frank Li
parent 8cd439f177
commit fa6067fd8e
1 changed files with 75 additions and 0 deletions
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75
arch/arm64/boot/dts/freescale/imx943.dtsi
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@ -209,4 +209,79 @@ map0 {
};
};
};
soc {
pcie1: pcie@4c380000 {
compatible = "fsl,imx943-pcie", "fsl,imx95-pcie";
reg = <0 0x4c380000 0 0x10000>,
<8 0x80100000 0 0xfe00000>,
<0 0x4c3e0000 0 0x10000>,
<0 0x4c3c0000 0 0x4000>;
reg-names = "dbi", "config", "atu", "app";
ranges = <0x81000000 0 0x00000000 0x8 0x8ff00000 0 0x00100000>,
<0x82000000 0 0x10000000 0xa 0x10000000 0 0x80000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
linux,pci-domain = <3>;
msi-map = <0x0 &its 0x98 0x1>,
<0x100 &its 0x99 0x7>;
msi-map-mask = <0x1ff>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
num-viewport = <8>;
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi", "dma";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &gic 0 0 GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &gic 0 0 GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &gic 0 0 GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk IMX94_CLK_HSIO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>,
<&hsio_blk_ctl 0>;
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks = <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
assigned-clock-parents = <0>, <0>,
<&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
fsl,max-link-speed = <3>;
status = "disabled";
};
pcie1_ep: pcie-ep@4c380000 {
compatible = "fsl,imx943-pcie-ep", "fsl,imx95-pcie-ep";
reg = <0 0x4c380000 0 0x10000>,
<0 0x4c3e0000 0 0x1000>,
<0 0x4c3a0000 0 0x1000>,
<0 0x4c3c0000 0 0x4000>,
<0 0x4c3f0000 0 0x10000>,
<0xa 0 1 0>;
reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";
num-lanes = <1>;
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dma";
clocks = <&scmi_clk IMX94_CLK_HSIO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
assigned-clocks = <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
assigned-clock-parents = <0>, <0>,
<&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
msi-map = <0x0 &its 0x98 0x1>;
power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
status = "disabled";
};
};
};