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arm64: dts: imx94: Add pcie0 and pcie0-ep supports

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Add pcie0 and pcie0-ep supports.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Richard Zhu 2026-05-06 13:53:14 +08:00 committed by Frank Li
parent 8a7c502c1e
commit 8cd439f177
1 changed files with 88 additions and 0 deletions
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88
arch/arm64/boot/dts/freescale/imx94.dtsi
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@ -67,6 +67,13 @@ sai4_mclk: clock-sai4-mclk1 {
clock-output-names = "sai4_mclk";
};
clk_sys100m: clock-sys100m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clock-output-names = "clk_sys100m";
};
firmware {
scmi {
compatible = "arm,scmi";
@ -1286,6 +1293,14 @@ wdog3: watchdog@49220000 {
};
};
hsio_blk_ctl: syscon@4c0100c0 {
compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
reg = <0x0 0x4c0100c0 0x0 0x1>;
#clock-cells = <1>;
clocks = <&clk_sys100m>;
power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
};
usb3: usb@4c100000 {
compatible = "nxp,imx94-dwc3", "nxp,imx8mp-dwc3";
reg = <0x0 0x4c100000 0x0 0x10000>,
@ -1340,6 +1355,79 @@ usbmisc: usbmisc@4c200200 {
#index-cells = <1>;
};
pcie0: pcie@4c300000 {
compatible = "fsl,imx94-pcie", "fsl,imx95-pcie";
reg = <0 0x4c300000 0 0x10000>,
<0 0x60100000 0 0xfe00000>,
<0 0x4c360000 0 0x10000>,
<0 0x4c340000 0 0x4000>;
reg-names = "dbi", "config", "atu", "app";
ranges = <0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000>,
<0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x80000000>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
linux,pci-domain = <2>;
msi-map = <0x0 &its 0x10 0x1>,
<0x100 &its 0x11 0x7>;
msi-map-mask = <0x1ff>;
bus-range = <0x00 0xff>;
num-lanes = <1>;
num-viewport = <8>;
interrupts = <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi", "dma";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &gic 0 0 GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &gic 0 0 GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &gic 0 0 GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scmi_clk IMX94_CLK_HSIO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>,
<&hsio_blk_ctl 0>;
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
assigned-clocks = <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
assigned-clock-parents = <0>, <0>,
<&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
fsl,max-link-speed = <3>;
status = "disabled";
};
pcie0_ep: pcie-ep@4c300000 {
compatible = "fsl,imx94-pcie-ep", "fsl,imx95-pcie-ep";
reg = <0 0x4c300000 0 0x10000>,
<0 0x4c360000 0 0x1000>,
<0 0x4c320000 0 0x1000>,
<0 0x4c340000 0 0x4000>,
<0 0x4c370000 0 0x10000>,
<0x9 0 1 0>;
reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";
num-lanes = <1>;
interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dma";
clocks = <&scmi_clk IMX94_CLK_HSIO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
assigned-clocks = <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
<&scmi_clk IMX94_CLK_HSIOPLL>,
<&scmi_clk IMX94_CLK_HSIOPCIEAUX>;
assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
assigned-clock-parents = <0>, <0>,
<&scmi_clk IMX94_CLK_SYSPLL1_PFD1_DIV2>;
msi-map = <0x0 &its 0x10 0x1>;
power-domains = <&scmi_devpd IMX94_PD_HSIO_TOP>;
status = "disabled";
};
netc_blk_ctrl: system-controller@4ceb0000 {
compatible = "nxp,imx94-netc-blk-ctrl";
reg = <0x0 0x4ceb0000 0x0 0x10000>,