dt-bindings: arm,corstone1000: Add "arm,corstone1000-a320-fvp"

The Arm Corstone1000-A320 is a variation of the Corstone1000 with
Cortex-A320 cores and an Ethos-U85 NPU. An FVP for the platform is
available here[1].

[1] https://developer.arm.com/Tools%20and%20Software/Fixed%20Virtual%20Platforms/IoT%20FVPs

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Message-Id: <20260320-dt-corstone1000-a320-v1-1-a549dfcfe8da@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
This commit is contained in:
Rob Herring (Arm) 2026-03-20 11:47:14 -05:00 committed by Sudeep Holla
parent 021915c788
commit f9d162866f

View File

@ -15,11 +15,11 @@ description: |+
provides a flexible compute architecture that combines CortexA and CortexM
processors.
Support for CortexA32, CortexA35 and CortexA53 processors. Two expansion
systems for M-Class (or other) processors for adding sensors, connectivity,
video, audio and machine learning at the edge System and security IPs to build
a secure SoC for a range of rich IoT applications, for example gateways, smart
cameras and embedded systems.
Support for CortexA32, CortexA35, CortexA53 and Cortex-A320 processors.
Two expansion systems for M-Class (or other) processors for adding sensors,
connectivity, video, audio and machine learning at the edge System and
security IPs to build a secure SoC for a range of rich IoT applications, for
example gateways, smart cameras and embedded systems.
Integrated Secure Enclave providing hardware Root of Trust and supporting
seamless integration of the optional CryptoCell™-312 cryptographic
@ -39,6 +39,11 @@ properties:
implementation of this system. See ARM ecosystems FVP's.
items:
- const: arm,corstone1000-fvp
- description: Corstone1000-A320 FVP is the Fixed Virtual Platform
implementation of this system with Cortex-A320 cores and Ethos-U85
NPU. See ARM ecosystems FVP's.
items:
- const: arm,corstone1000-a320-fvp
additionalProperties: true