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arm64: dts: zena: Move SRAM into SoC and memory node out of SoC
Move the SRAM node into the SoC node. Move the memory node out of the include to make it customizable for each platform variant. Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com> Message-Id: <20260311173948.3478931-1-debbie.horsfall@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
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@ -14,6 +14,14 @@ / {
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chosen {
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stdout-path = &soc_serial0;
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};
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memory@80000000 {
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device_type = "memory";
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/* ~2GB mapped at 2GB, another 2GB at 2TB */
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reg = <0x00000000 0x80000000 0x00000000 0x7f000000>,
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<0x00000200 0x00000000 0x00000000 0x80000000>;
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};
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};
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&soc {
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@ -634,6 +634,24 @@ soc: soc {
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#size-cells = <2>;
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ranges;
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sram: sram@104000 {
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compatible = "mmio-sram";
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reg = <0x0 0x00104000 0x0 0x00001000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x00104000 0x00001000>;
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scmi_shmem_tx: scpshmem-sram-section@0 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x100>;
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};
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scmi_shmem_rx: scpshmem-sram-section@100 {
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compatible = "arm,scmi-shmem";
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reg = <0x100 0x100>;
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};
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};
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timer@1a810000 {
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compatible = "arm,armv7-timer-mem";
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reg = <0x0 0x1a810000 0x0 0x10000>;
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@ -748,30 +766,4 @@ timer {
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
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};
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sram: sram@104000 {
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compatible = "mmio-sram";
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reg = <0x0 0x00104000 0x0 0x00001000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x00104000 0x00001000>;
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scmi_shmem_tx: scpshmem-sram-section@0 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x100>;
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};
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scmi_shmem_rx: scpshmem-sram-section@100 {
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compatible = "arm,scmi-shmem";
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reg = <0x100 0x100>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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/* ~2GB mapped at 2GB, another 2GB at 2TB */
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reg = <0x00000000 0x80000000 0x00000000 0x7f000000>,
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<0x00000200 0x00000000 0x00000000 0x80000000>;
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};
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};
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