From 021915c7885fb1c83810930d527fa513877138d6 Mon Sep 17 00:00:00 2001
From: Debbie Horsfall <debbie.horsfall@arm.com>
Date: Wed, 11 Mar 2026 17:39:48 +0000
Subject: [PATCH] arm64: dts: zena: Move SRAM into SoC and memory node out of
 SoC

Move the SRAM node into the SoC node. Move the memory node out of
the include to make it customizable for each platform variant.

Signed-off-by: Debbie Horsfall <debbie.horsfall@arm.com>
Message-Id: <20260311173948.3478931-1-debbie.horsfall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
---
 arch/arm64/boot/dts/arm/zena-css-fvp.dts |  8 +++++
 arch/arm64/boot/dts/arm/zena-css.dtsi    | 44 ++++++++++--------------
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/arch/arm64/boot/dts/arm/zena-css-fvp.dts b/arch/arm64/boot/dts/arm/zena-css-fvp.dts
index b75204a91882..53c5412d92b2 100644
--- a/arch/arm64/boot/dts/arm/zena-css-fvp.dts
+++ b/arch/arm64/boot/dts/arm/zena-css-fvp.dts
@@ -14,6 +14,14 @@ / {
 	chosen {
 		stdout-path = &soc_serial0;
 	};
+
+	memory@80000000 {
+		device_type = "memory";
+
+		/* ~2GB mapped at 2GB, another 2GB at 2TB */
+		reg = <0x00000000 0x80000000 0x00000000 0x7f000000>,
+		      <0x00000200 0x00000000 0x00000000 0x80000000>;
+	};
 };
 
 &soc {
diff --git a/arch/arm64/boot/dts/arm/zena-css.dtsi b/arch/arm64/boot/dts/arm/zena-css.dtsi
index 9899d2883337..0b41ee4bf4c6 100644
--- a/arch/arm64/boot/dts/arm/zena-css.dtsi
+++ b/arch/arm64/boot/dts/arm/zena-css.dtsi
@@ -634,6 +634,24 @@ soc: soc {
 		#size-cells = <2>;
 		ranges;
 
+		sram: sram@104000 {
+			compatible = "mmio-sram";
+			reg = <0x0 0x00104000 0x0 0x00001000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x0 0x00104000 0x00001000>;
+
+			scmi_shmem_tx: scpshmem-sram-section@0 {
+				compatible = "arm,scmi-shmem";
+				reg = <0x0 0x100>;
+			};
+
+			scmi_shmem_rx: scpshmem-sram-section@100 {
+				compatible = "arm,scmi-shmem";
+				reg = <0x100 0x100>;
+			};
+		};
+
 		timer@1a810000 {
 			compatible = "arm,armv7-timer-mem";
 			reg = <0x0 0x1a810000 0x0 0x10000>;
@@ -748,30 +766,4 @@ timer {
 			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
 			     <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
 	};
-
-	sram: sram@104000 {
-		compatible = "mmio-sram";
-		reg = <0x0 0x00104000 0x0 0x00001000>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-		ranges = <0 0x0 0x00104000 0x00001000>;
-
-		scmi_shmem_tx: scpshmem-sram-section@0 {
-			compatible = "arm,scmi-shmem";
-			reg = <0x0 0x100>;
-		};
-
-		scmi_shmem_rx: scpshmem-sram-section@100 {
-			compatible = "arm,scmi-shmem";
-			reg = <0x100 0x100>;
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-
-		/* ~2GB mapped at 2GB, another 2GB at 2TB */
-		reg = <0x00000000 0x80000000 0x00000000 0x7f000000>,
-		      <0x00000200 0x00000000 0x00000000 0x80000000>;
-	};
 };