github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-10-12 13:27:02 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: qcom: ipq5332: Move PHYs and PERST# to Root Port node

Browse Source 
Follow the new binding style by defining PHYs and PERST# (now RESET#)
under the Root Port node. Avoid mixing styles and move these properties
to the RP node.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260609-move_perst_to_rp-v2-1-6c731523d08c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Kathiravan Thirumoorthy 2026-06-09 22:34:05 +05:30 committed by Bjorn Andersson
parent 9c10f67778
commit f662fca3dc
2 changed files with 16 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts
View File

@ -36,9 +36,6 @@ &pcie0 {
pinctrl-0 = <&pcie0_default>;
pinctrl-names = "default";
perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
status = "okay";
};
@ -46,13 +43,15 @@ &pcie0_phy {
status = "okay";
};
&pcie0_port0 {
reset-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
};
&pcie1 {
pinctrl-0 = <&pcie1_default>;
pinctrl-names = "default";
perst-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
status = "okay";
};
@ -60,6 +59,11 @@ &pcie1_phy {
status = "okay";
};
&pcie1_port0 {
reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
};
&tlmm {
i2c_1_pins: i2c-1-state {
pins = "gpio29", "gpio30";

14
arch/arm64/boot/dts/qcom/ipq5332.dtsi
View File

@ -741,19 +741,18 @@ pcie1: pcie@18000000 {
"aux",
"ahb";
phys = <&pcie1_phy>;
phy-names = "pciephy";
interconnects = <&gcc MASTER_SNOC_PCIE3_2_M &gcc SLAVE_SNOC_PCIE3_2_M>,
<&gcc MASTER_ANOC_PCIE3_2_S &gcc SLAVE_ANOC_PCIE3_2_S>;
interconnect-names = "pcie-mem", "cpu-pcie";
status = "disabled";
pcie@0 {
pcie1_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
phys = <&pcie1_phy>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
@ -845,19 +844,18 @@ pcie0: pcie@20000000 {
"aux",
"ahb";
phys = <&pcie0_phy>;
phy-names = "pciephy";
interconnects = <&gcc MASTER_SNOC_PCIE3_1_M &gcc SLAVE_SNOC_PCIE3_1_M>,
<&gcc MASTER_ANOC_PCIE3_1_S &gcc SLAVE_ANOC_PCIE3_1_S>;
interconnect-names = "pcie-mem", "cpu-pcie";
status = "disabled";
pcie@0 {
pcie0_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
phys = <&pcie0_phy>;
#address-cells = <3>;
#size-cells = <2>;
ranges;