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EDAC/igen6: Fix interleave boundary condition

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The address translation logic splits the memory space into interleaved
and non-interleaved regions using a boundary at 2 * s_size.

The current check uses '>' and incorrectly classifies the boundary
address (2 * s_size) as part of the interleaved region. This leads to
incorrect channel/sub-channel selection at the region boundary.

Fix the classification by using '>=' so that the boundary address is
handled in the non-interleaved region, matching the hardware layout.

Fixes: 10590a9d4f ("EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC")
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://patch.msgid.link/20260730024238.4096623-3-qiuxu.zhuo@intel.com
This commit is contained in:
Qiuxu Zhuo 2026-07-30 10:42:30 +08:00 committed by Tony Luck
parent 141556543c
commit f4008169bd
1 changed files with 1 additions and 1 deletions
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2
drivers/edac/igen6_edac.c
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@ -1035,7 +1035,7 @@ static void decode_addr(u64 addr, u32 hash, u64 s_size, int l_map,
{
int intlv_bit = CHANNEL_HASH_LSB_MASK_BIT(hash) + 6;
if (addr > 2 * s_size) {
if (addr >= 2 * s_size) {
*sub_addr = addr - s_size;
*idx = l_map;
return;