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EDAC/ie31200: Decouple DIMM width decoding from enum order
The current method to get DIMM width relied on DEV_* enum ordering via a linear offset (+ DEV_X8), tightly coupling hardware encoding to enum layout. Replace it with explicit decoding to remove this dependency, as the enum is expected to grow with additional device widths. Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Link: https://patch.msgid.link/20260730024238.4096623-2-qiuxu.zhuo@intel.com
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@ -416,7 +416,23 @@ static void populate_dimm_info(struct dimm_data *dd, u32 addr_decode, int dimm,
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{
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dd->size = field_get(cfg->reg_mad_dimm_size_mask[dimm], addr_decode) * cfg->reg_mad_dimm_size_granularity;
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dd->ranks = field_get(cfg->reg_mad_dimm_rank_mask[dimm], addr_decode) + 1;
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dd->dtype = field_get(cfg->reg_mad_dimm_width_mask[dimm], addr_decode) + DEV_X8;
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switch (field_get(cfg->reg_mad_dimm_width_mask[dimm], addr_decode)) {
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case 0:
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dd->dtype = DEV_X8;
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break;
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case 1:
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dd->dtype = DEV_X16;
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break;
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case 2:
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dd->dtype = DEV_X32;
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break;
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case 3:
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dd->dtype = DEV_X64;
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break;
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default:
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dd->dtype = DEV_UNKNOWN;
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}
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}
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static void ie31200_get_dimm_config(struct mem_ctl_info *mci, void __iomem *window,
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