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clk: correct clk_div_mask() return value for width == 32

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The macro clk_div_mask() currently wraps to zero when width is 32 due to
1 << 32 being undefined behavior. This leads to incorrect mask generation
and prevents correct retrieval of register field values for 32-bit-wide
dividers.

Although it is unlikely to exhaust all U32_MAX div, some clock IPs may rely
on a 32-bit val entry in their div_table to match a div, so providing a
full 32-bit mask is necessary.

Fix this by using the standard GENMASK() macro. This safely resolves the
undefined behavior on both 32-bit and 64-bit architectures, while also
benefiting from the built-in compile-time type and bounds checking
provided by the GENMASK() macro.

Cc: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Cc: Brian Masney <bmasney@redhat.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Brian Masney <bmasney@redhat.com>
This commit is contained in:
Junhui Liu 2026-05-14 17:27:17 +08:00 committed by Brian Masney
parent b6685c30d1
commit f036decc44
1 changed files with 2 additions and 1 deletions
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3
include/linux/clk-provider.h
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@ -7,6 +7,7 @@
#define __LINUX_CLK_PROVIDER_H
#include <dt-bindings/clock/clock.h>
#include <linux/bits.h>
#include <linux/of.h>
#include <linux/of_clk.h>
@ -757,7 +758,7 @@ struct clk_divider {
spinlock_t *lock;
};
#define clk_div_mask(width) ((1 << (width)) - 1)
#define clk_div_mask(width) GENMASK((width) - 1, 0)
#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
#define CLK_DIVIDER_ONE_BASED BIT(0)