From f036decc4434323b47b58ad9508fe27d8c9087c2 Mon Sep 17 00:00:00 2001 From: Junhui Liu Date: Thu, 14 May 2026 17:27:17 +0800 Subject: [PATCH] clk: correct clk_div_mask() return value for width == 32 The macro clk_div_mask() currently wraps to zero when width is 32 due to 1 << 32 being undefined behavior. This leads to incorrect mask generation and prevents correct retrieval of register field values for 32-bit-wide dividers. Although it is unlikely to exhaust all U32_MAX div, some clock IPs may rely on a 32-bit val entry in their div_table to match a div, so providing a full 32-bit mask is necessary. Fix this by using the standard GENMASK() macro. This safely resolves the undefined behavior on both 32-bit and 64-bit architectures, while also benefiting from the built-in compile-time type and bounds checking provided by the GENMASK() macro. Cc: Troy Mitchell Cc: Brian Masney Signed-off-by: Junhui Liu Reviewed-by: Troy Mitchell Reviewed-by: Brian Masney Reviewed-by: Jerome Brunet Signed-off-by: Brian Masney --- include/linux/clk-provider.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 58902e8dfd68..a355d1ee5189 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -7,6 +7,7 @@ #define __LINUX_CLK_PROVIDER_H #include +#include #include #include @@ -757,7 +758,7 @@ struct clk_divider { spinlock_t *lock; }; -#define clk_div_mask(width) ((1 << (width)) - 1) +#define clk_div_mask(width) GENMASK((width) - 1, 0) #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw) #define CLK_DIVIDER_ONE_BASED BIT(0)