net: stmmac: qcom-ethqos: rename "por" members to "rgmii_por"

Rename the "por" and "num_por" members to indicate that they are for
RGMII mode only as ethqos_configure_rgmii() is the only place that the
values are programmed into the registers.

Reviewed-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Tested-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vuSKV-0000000ASbg-28JK@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Russell King (Oracle) 2026-02-23 09:34:15 +00:00 committed by Jakub Kicinski
parent 583706230e
commit ebfc2be12e

View File

@ -87,8 +87,8 @@ struct ethqos_emac_por {
};
struct ethqos_emac_driver_data {
const struct ethqos_emac_por *por;
unsigned int num_por;
const struct ethqos_emac_por *rgmii_por;
unsigned int num_rgmii_por;
bool rgmii_config_loopback_en;
bool has_emac_ge_3;
const char *link_clk_name;
@ -108,8 +108,8 @@ struct qcom_ethqos {
int serdes_speed;
phy_interface_t phy_mode;
const struct ethqos_emac_por *por;
unsigned int num_por;
const struct ethqos_emac_por *rgmii_por;
unsigned int num_rgmii_por;
bool rgmii_config_loopback_en;
bool has_emac_ge_3;
bool needs_sgmii_loopback;
@ -218,8 +218,8 @@ static const struct ethqos_emac_por emac_v2_3_0_por[] = {
};
static const struct ethqos_emac_driver_data emac_v2_3_0_data = {
.por = emac_v2_3_0_por,
.num_por = ARRAY_SIZE(emac_v2_3_0_por),
.rgmii_por = emac_v2_3_0_por,
.num_rgmii_por = ARRAY_SIZE(emac_v2_3_0_por),
.rgmii_config_loopback_en = true,
.has_emac_ge_3 = false,
};
@ -234,8 +234,8 @@ static const struct ethqos_emac_por emac_v2_1_0_por[] = {
};
static const struct ethqos_emac_driver_data emac_v2_1_0_data = {
.por = emac_v2_1_0_por,
.num_por = ARRAY_SIZE(emac_v2_1_0_por),
.rgmii_por = emac_v2_1_0_por,
.num_rgmii_por = ARRAY_SIZE(emac_v2_1_0_por),
.rgmii_config_loopback_en = false,
.has_emac_ge_3 = false,
};
@ -250,8 +250,8 @@ static const struct ethqos_emac_por emac_v3_0_0_por[] = {
};
static const struct ethqos_emac_driver_data emac_v3_0_0_data = {
.por = emac_v3_0_0_por,
.num_por = ARRAY_SIZE(emac_v3_0_0_por),
.rgmii_por = emac_v3_0_0_por,
.num_rgmii_por = ARRAY_SIZE(emac_v3_0_0_por),
.rgmii_config_loopback_en = false,
.has_emac_ge_3 = true,
.dwmac4_addrs = {
@ -282,8 +282,8 @@ static const struct ethqos_emac_por emac_v4_0_0_por[] = {
};
static const struct ethqos_emac_driver_data emac_v4_0_0_data = {
.por = emac_v4_0_0_por,
.num_por = ARRAY_SIZE(emac_v4_0_0_por),
.rgmii_por = emac_v4_0_0_por,
.num_rgmii_por = ARRAY_SIZE(emac_v4_0_0_por),
.rgmii_config_loopback_en = false,
.has_emac_ge_3 = true,
.link_clk_name = "phyaux",
@ -522,9 +522,9 @@ static int ethqos_configure_rgmii(struct qcom_ethqos *ethqos, int speed)
u32 val;
/* Reset to POR values and enable clk */
for (i = 0; i < ethqos->num_por; i++)
rgmii_writel(ethqos, ethqos->por[i].value,
ethqos->por[i].offset);
for (i = 0; i < ethqos->num_rgmii_por; i++)
rgmii_writel(ethqos, ethqos->rgmii_por[i].value,
ethqos->rgmii_por[i].offset);
ethqos_set_func_clk_en(ethqos);
/* Initialize the DLL first */
@ -780,8 +780,8 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
"Failed to map rgmii resource\n");
data = of_device_get_match_data(dev);
ethqos->por = data->por;
ethqos->num_por = data->num_por;
ethqos->rgmii_por = data->rgmii_por;
ethqos->num_rgmii_por = data->num_rgmii_por;
ethqos->rgmii_config_loopback_en = data->rgmii_config_loopback_en;
ethqos->has_emac_ge_3 = data->has_emac_ge_3;
ethqos->needs_sgmii_loopback = data->needs_sgmii_loopback;