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Merge branch 'net-ethernet-enic-add-vic-ids-and-link-modes'

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Satish Kharat says:

====================
eth: enic: add VIC ids and link modes

Add VIC subsystem ids and their supported/advertised media types so ethtool
reflects the hardware capabilities for the VIC variants.
====================

Link: https://patch.msgid.link/20260223-enic-cscwi36355-v2-0-63488194a974@cisco.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2026-02-24 17:20:13 -08:00
commit 583706230e
2 changed files with 187 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
drivers/net/ethernet/cisco/enic/enic.h
View File

@ -22,6 +22,45 @@
#define DRV_NAME "enic"
#define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver"
#define PCI_SUBDEV_ID_CISCO_VIC_1225 0x085
#define PCI_SUBDEV_ID_CISCO_VIC_1225T 0x0CE
#define PCI_SUBDEV_ID_CISCO_VIC_1227 0x12E
#define PCI_SUBDEV_ID_CISCO_VIC_1227T 0x139
#define PCI_SUBDEV_ID_CISCO_VIC_1240 0x084
#define PCI_SUBDEV_ID_CISCO_VIC_1280 0x04F
#define PCI_SUBDEV_ID_CISCO_VIC_1285 0x0CD
#define PCI_SUBDEV_ID_CISCO_VIC_1340 0x12C
#define PCI_SUBDEV_ID_CISCO_VIC_1380 0x137
#define PCI_SUBDEV_ID_CISCO_VIC_1385 0x14D
#define PCI_SUBDEV_ID_CISCO_VIC_1387 0x15D
#define PCI_SUBDEV_ID_CISCO_VIC_1440 0x0215
#define PCI_SUBDEV_ID_CISCO_VIC_1455 0x0217
#define PCI_SUBDEV_ID_CISCO_VIC_1457 0x0218
#define PCI_SUBDEV_ID_CISCO_VIC_1467 0x02AF
#define PCI_SUBDEV_ID_CISCO_VIC_1477 0x2B0
#define PCI_SUBDEV_ID_CISCO_VIC_1480 0x0216
#define PCI_SUBDEV_ID_CISCO_VIC_1485 0x0219
#define PCI_SUBDEV_ID_CISCO_VIC_1487 0x021A
#define PCI_SUBDEV_ID_CISCO_VIC_1495 0x024A
#define PCI_SUBDEV_ID_CISCO_VIC_1497 0x024B
#define PCI_SUBDEV_ID_CISCO_VIC_14425 0x02CF
#define PCI_SUBDEV_ID_CISCO_VIC_14825 0x02D0
#define PCI_SUBDEV_ID_CISCO_VIC_15230 0x02DF
#define PCI_SUBDEV_ID_CISCO_VIC_15231 0x02DB
#define PCI_SUBDEV_ID_CISCO_VIC_15235 0x02E4
#define PCI_SUBDEV_ID_CISCO_VIC_15237 0x02F3
#define PCI_SUBDEV_ID_CISCO_VIC_15238 0x02E8
#define PCI_SUBDEV_ID_CISCO_VIC_15411 0x02DC
#define PCI_SUBDEV_ID_CISCO_VIC_15412 0x02E2
#define PCI_SUBDEV_ID_CISCO_VIC_15420 0x02DE
#define PCI_SUBDEV_ID_CISCO_VIC_15422 0x02E1
#define PCI_SUBDEV_ID_CISCO_VIC_15425 0x02F2
#define PCI_SUBDEV_ID_CISCO_VIC_15427 0x02E0
#define PCI_SUBDEV_ID_CISCO_VIC_15428 0x02DD
#define ENIC_BARS_MAX 6
#define ENIC_WQ_MAX 256

155
drivers/net/ethernet/cisco/enic/enic_ethtool.c
View File

@ -126,19 +126,160 @@ static void enic_intr_coal_set_rx(struct enic *enic, u32 timer)
}
}
static void enic_get_supp_adv_media_type(struct net_device *netdev,
struct ethtool_link_ksettings *ecmd)
{
struct enic *enic = netdev_priv(netdev);
struct ethtool_link_settings *base = &ecmd->base;
u16 sub_dev_id = 0;
base->port = PORT_OTHER;
if (enic->pdev)
sub_dev_id = enic->pdev->subsystem_device;
switch (sub_dev_id) {
case PCI_SUBDEV_ID_CISCO_VIC_1225:
case PCI_SUBDEV_ID_CISCO_VIC_1227:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseSR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_1285:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_1225T:
case PCI_SUBDEV_ID_CISCO_VIC_1227T:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseT_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_1385:
case PCI_SUBDEV_ID_CISCO_VIC_1387:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseSR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseLR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseLR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_1477:
case PCI_SUBDEV_ID_CISCO_VIC_1485:
case PCI_SUBDEV_ID_CISCO_VIC_1487:
case PCI_SUBDEV_ID_CISCO_VIC_1495:
case PCI_SUBDEV_ID_CISCO_VIC_1497:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseCR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseLR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
100000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
100000baseCR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_15235:
case PCI_SUBDEV_ID_CISCO_VIC_15237:
case PCI_SUBDEV_ID_CISCO_VIC_15238:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseCR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseLR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
100000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
100000baseCR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
200000baseSR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
200000baseDR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
200000baseLR4_ER4_FR4_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_1455:
case PCI_SUBDEV_ID_CISCO_VIC_1457:
case PCI_SUBDEV_ID_CISCO_VIC_1467:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseT_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
25000baseSR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
case PCI_SUBDEV_ID_CISCO_VIC_15428:
case PCI_SUBDEV_ID_CISCO_VIC_15427:
case PCI_SUBDEV_ID_CISCO_VIC_15425:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseT_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
25000baseSR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
50000baseSR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
base->port = PORT_FIBRE;
break;
/* Do not mention port type as FIBRE for blade VICs */
case PCI_SUBDEV_ID_CISCO_VIC_1240:
case PCI_SUBDEV_ID_CISCO_VIC_1280:
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseKR_Full);
break;
case PCI_SUBDEV_ID_CISCO_VIC_1340:
case PCI_SUBDEV_ID_CISCO_VIC_1380:
case PCI_SUBDEV_ID_CISCO_VIC_1440: /* 10G/40G KR */
case PCI_SUBDEV_ID_CISCO_VIC_1480: /* 10G/40G KR */
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseKR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
40000baseKR4_Full);
break;
case PCI_SUBDEV_ID_CISCO_VIC_14425: /* 25G KR */
case PCI_SUBDEV_ID_CISCO_VIC_14825: /* 25G KR */
case PCI_SUBDEV_ID_CISCO_VIC_15420: /* 25G KR */
case PCI_SUBDEV_ID_CISCO_VIC_15422: /* 25G KR */
ethtool_link_ksettings_add_link_mode(ecmd, supported,
25000baseKR_Full);
break;
case PCI_SUBDEV_ID_CISCO_VIC_15411: /* 10G KR */
case PCI_SUBDEV_ID_CISCO_VIC_15412: /* 10G KR */
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseKR_Full);
break;
case PCI_SUBDEV_ID_CISCO_VIC_15231: /* 25G/100G/200G KR */
case PCI_SUBDEV_ID_CISCO_VIC_15230: /* 25G/100G/200G KR */
ethtool_link_ksettings_add_link_mode(ecmd, supported,
25000baseKR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
100000baseKR_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported,
200000baseKR4_Full);
break;
}
}
static int enic_get_ksettings(struct net_device *netdev,
struct ethtool_link_ksettings *ecmd)
{
struct enic *enic = netdev_priv(netdev);
struct ethtool_link_settings *base = &ecmd->base;
ethtool_link_ksettings_add_link_mode(ecmd, supported,
10000baseT_Full);
ethtool_link_ksettings_add_link_mode(ecmd, supported, FIBRE);
ethtool_link_ksettings_add_link_mode(ecmd, advertising,
10000baseT_Full);
ethtool_link_ksettings_add_link_mode(ecmd, advertising, FIBRE);
base->port = PORT_FIBRE;
enic_get_supp_adv_media_type(netdev, ecmd);
if (netif_carrier_ok(netdev)) {
base->speed = vnic_dev_port_speed(enic->vdev);