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PCI/P2PDMA: Add Intel Xeon E3 v4/E5 v4/E7 v4 host bridge to allowlist

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For P2P paths routed through a host bridge, the P2PDMA core consults an
allowlist of known-good hardware. Add Intel 8086:6f00 with
REQ_SAME_HOST_BRIDGE so the entry permits peers only below the same host
bridge.

The bridge was tested on a single-socket Intel Xeon E5-2697A v4 system
with two PCIe GPUs below different Root Ports of the same host bridge.
Without the allowlist entry, peer access was rejected before a transfer
was issued. With the entry, 64 MiB peer transfers completed in both
directions with data integrity verified while the IOMMU used translated
mode.

Assisted-by: LLM
Signed-off-by: kai zhang <zhangkai.cool@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20261007141558.59852-1-zhangkai.cool@gmail.com
This commit is contained in:
kai zhang 2026-10-07 22:15:58 +08:00 committed by Bjorn Helgaas
parent 0b9df403dd
commit e7b44579a6
1 changed files with 2 additions and 0 deletions
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2
drivers/pci/p2pdma.c
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@ -542,6 +542,8 @@ static const struct pci_p2pdma_whitelist_entry {
/* Intel Xeon E5/Core i7 */
{PCI_VENDOR_ID_INTEL, 0x3c00, REQ_SAME_HOST_BRIDGE},
{PCI_VENDOR_ID_INTEL, 0x3c01, REQ_SAME_HOST_BRIDGE},
/* Intel Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D */
{PCI_VENDOR_ID_INTEL, 0x6f00, REQ_SAME_HOST_BRIDGE},
/* Intel Xeon E7 v3/Xeon E5 v3/Core i7 */
{PCI_VENDOR_ID_INTEL, 0x2f00, REQ_SAME_HOST_BRIDGE},
{PCI_VENDOR_ID_INTEL, 0x2f01, REQ_SAME_HOST_BRIDGE},