From e7b44579a6b4495c03720da49f2eeaf13a94ba69 Mon Sep 17 00:00:00 2001 From: kai zhang Date: Wed, 7 Oct 2026 22:15:58 +0800 Subject: [PATCH] PCI/P2PDMA: Add Intel Xeon E3 v4/E5 v4/E7 v4 host bridge to allowlist For P2P paths routed through a host bridge, the P2PDMA core consults an allowlist of known-good hardware. Add Intel 8086:6f00 with REQ_SAME_HOST_BRIDGE so the entry permits peers only below the same host bridge. The bridge was tested on a single-socket Intel Xeon E5-2697A v4 system with two PCIe GPUs below different Root Ports of the same host bridge. Without the allowlist entry, peer access was rejected before a transfer was issued. With the entry, 64 MiB peer transfers completed in both directions with data integrity verified while the IOMMU used translated mode. Assisted-by: LLM Signed-off-by: kai zhang Signed-off-by: Bjorn Helgaas Link: https://patch.msgid.link/20261007141558.59852-1-zhangkai.cool@gmail.com --- drivers/pci/p2pdma.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c index 0b22ca48b0b4..5520d79da749 100644 --- a/drivers/pci/p2pdma.c +++ b/drivers/pci/p2pdma.c @@ -542,6 +542,8 @@ static const struct pci_p2pdma_whitelist_entry { /* Intel Xeon E5/Core i7 */ {PCI_VENDOR_ID_INTEL, 0x3c00, REQ_SAME_HOST_BRIDGE}, {PCI_VENDOR_ID_INTEL, 0x3c01, REQ_SAME_HOST_BRIDGE}, + /* Intel Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D */ + {PCI_VENDOR_ID_INTEL, 0x6f00, REQ_SAME_HOST_BRIDGE}, /* Intel Xeon E7 v3/Xeon E5 v3/Core i7 */ {PCI_VENDOR_ID_INTEL, 0x2f00, REQ_SAME_HOST_BRIDGE}, {PCI_VENDOR_ID_INTEL, 0x2f01, REQ_SAME_HOST_BRIDGE},