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arm64: ZynqMP DT changes for v6.6
- Describe caches - Fix i2c gpio recovery description - Setting up default i2c frequency - Describe GEM TSU clock and assigned rates for SOMs - Reserved 1MB for internal firmware usage - Fix dwc3 IRQ description - Describe interrupts by using macros -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZMzehwAKCRDKSWXLKUoM ISvjAJ4w2hMTWmidv38lFqEZbBo/g/YOswCeKEKGx7opgHWSi7mtArtN6i4lakw= =wtLU -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmTXRlMACgkQYKtH/8kJ UidUnRAAgWC0N42rvgYRJmE/1BH4P+HmxghnE/1piXM9JdTz7i9VvHOY7yWNR3w5 XUuvAQbZhx2VGtUFKvLPPsq7PcizLVPHetj9lNrs5a+8Oakfjjk6Y1Hsfob73e6z Z+Gg15xq921TCBGMq7usdOQ80vCj/j7P04hKY89koBQ4ZrF8czPEBcP0D2xjOllx wJnPn5N82HoqgExYLl/echjm80YD9LyzGu3jw1+G2QqclGtaQOzAVaeNXYgSnoBq SHkOGD6hxw7oUK5YNSA1l561kAZylivUuDljIO8JHCu8OiY3BwfMYiSAvRR3Q2zl MYaYtc9xYhMjDFp7r3aPcpoyYt4j72Tl3wxbMrB5DKCQqHMD90Ll+rI9DbEXgtcg lwSe1BJMb9noa6KrrxeSrUUEgXBrxJuWoYcNuLjVY9fL0lr6zzZ7uxZfnyNf9amZ RDaQA+6uw6lpRoL1niaSxlJLFWy8pBcqdHAjkSt4fP/RYvDtvUlFYguHWW+1QDtA mtdcxXLa+207y3M3KRaaHBI4XpFy/NCkWR7DzHBqw3tJG+H7T7Ibu9PCHPLUcVyz B4ZdObnrfg+uhzMv1C19NkXApCqr5kIIkLuZ8eU/u7Jf490OCYl7YcvEaJQAqQFO 8aBiixjbK3k92kziTgqp9xMUiwljLoL+OsHnGjJ3v18TL6/6LaQ= =bVCE -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-6.6' of https://github.com/Xilinx/linux-xlnx into soc/dt arm64: ZynqMP DT changes for v6.6 - Describe caches - Fix i2c gpio recovery description - Setting up default i2c frequency - Describe GEM TSU clock and assigned rates for SOMs - Reserved 1MB for internal firmware usage - Fix dwc3 IRQ description - Describe interrupts by using macros * tag 'zynqmp-dt-for-6.6' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Describe interrupts by using macros arm64: zynqmp: Fix dwc3 usb interrupt description arm64: zynqmp: Add memory reserved node for k26 Kria SOM board arm64: zynqmp: Assign TSU clock frequency for GEMs arm64: zynqmp: Setting default i2c clock frequency to 400kHz arm64: zynqmp: Fix open drain warning on ZynqMP arm64: zynqmp: Add L2 cache nodes Link: https://lore.kernel.org/r/fde6d7b4-c751-219d-3ec5-04e5bad2aa17@monstr.eu Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
e5963e1596
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@ -146,24 +146,28 @@ &gem0 {
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clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
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<&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
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<&zynqmp_clk GEM_TSU>;
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assigned-clocks = <&zynqmp_clk GEM_TSU>;
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};
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&gem1 {
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clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
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<&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
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<&zynqmp_clk GEM_TSU>;
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assigned-clocks = <&zynqmp_clk GEM_TSU>;
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};
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&gem2 {
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clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
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<&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
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<&zynqmp_clk GEM_TSU>;
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assigned-clocks = <&zynqmp_clk GEM_TSU>;
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};
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&gem3 {
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clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
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<&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
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<&zynqmp_clk GEM_TSU>;
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assigned-clocks = <&zynqmp_clk GEM_TSU>;
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};
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&gpio {
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@ -27,8 +27,8 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* u14 - 0x40 - ina260 */
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/* u27 - 0xe0 - STDP4320 DP/HDMI splitter */
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@ -145,6 +145,7 @@ &gem3 { /* required by spec */
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pinctrl-0 = <&pinctrl_gem3_default>;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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assigned-clock-rates = <250000000>;
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mdio: mdio {
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#address-cells = <1>;
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@ -22,8 +22,8 @@ &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* u14 - 0x40 - ina260 */
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/* u43 - 0x2d - usb5744 */
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@ -128,6 +128,7 @@ &gem3 { /* required by spec */
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pinctrl-0 = <&pinctrl_gem3_default>;
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phy-handle = <&phy0>;
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phy-mode = "rgmii-id";
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assigned-clock-rates = <250000000>;
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mdio: mdio {
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#address-cells = <1>;
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@ -50,6 +50,17 @@ memory@0 {
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reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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pmu_region: pmu@7ff00000 {
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reg = <0x0 0x7ff00000 0x0 0x100000>;
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no-map;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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@ -245,8 +256,8 @@ &i2c1 {
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status = "okay";
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bootph-all;
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clock-frequency = <400000>;
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scl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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eeprom: eeprom@50 { /* u46 - also at address 0x58 */
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bootph-all;
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@ -119,8 +119,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 36 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 36 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 37 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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eeprom: eeprom@55 {
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compatible = "atmel,24c64"; /* 24AA64 */
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@ -110,8 +110,8 @@ &i2c0 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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scl-gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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tca6416_u26: gpio@20 {
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compatible = "ti,tca6416";
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@ -91,8 +91,8 @@ &i2c0 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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scl-gpios = <&gpio 74 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 75 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 74 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 75 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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};
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&i2c1 {
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@ -100,8 +100,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 76 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 77 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 76 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 77 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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};
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@ -180,8 +180,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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clock-frequency = <100000>;
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i2c-mux@75 { /* u11 */
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compatible = "nxp,pca9548";
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@ -233,8 +233,8 @@ &i2c0 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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tca6416_u97: gpio@20 {
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compatible = "ti,tca6416";
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@ -497,8 +497,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* PL i2c via PCA9306 - u45 */
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i2c-mux@74 { /* u34 */
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@ -140,8 +140,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* Another connection to this bus via PL i2c via PCA9306 - u45 */
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i2c-mux@74 { /* u34 */
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@ -145,8 +145,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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tca6416_u97: gpio@20 {
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compatible = "ti,tca6416";
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@ -245,8 +245,8 @@ &i2c0 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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tca6416_u97: gpio@20 {
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compatible = "ti,tca6416";
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@ -508,8 +508,8 @@ &i2c1 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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/* PL i2c via PCA9306 - u45 */
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i2c-mux@74 { /* u34 */
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@ -205,8 +205,8 @@ &i2c0 {
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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pinctrl-1 = <&pinctrl_i2c0_gpio>;
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scl-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
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sda-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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tca6416_u22: gpio@20 {
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compatible = "ti,tca6416";
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@ -385,8 +385,8 @@ &i2c1 {
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|||
pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c1_default>;
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pinctrl-1 = <&pinctrl_i2c1_gpio>;
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scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
|
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sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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scl-gpios = <&gpio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
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sda-gpios = <&gpio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
|
||||
i2c-mux@74 { /* u26 */
|
||||
compatible = "nxp,pca9548";
|
||||
|
|
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|||
|
|
@ -14,6 +14,8 @@
|
|||
|
||||
#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/power/xlnx-zynqmp-power.h>
|
||||
#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
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||||
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||||
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@ -33,6 +35,7 @@ cpu0: cpu@0 {
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|||
operating-points-v2 = <&cpu_opp_table>;
|
||||
reg = <0x0>;
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||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
|
|
@ -42,6 +45,7 @@ cpu1: cpu@1 {
|
|||
reg = <0x1>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu2: cpu@2 {
|
||||
|
|
@ -51,6 +55,7 @@ cpu2: cpu@2 {
|
|||
reg = <0x2>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu3: cpu@3 {
|
||||
|
|
@ -60,6 +65,13 @@ cpu3: cpu@3 {
|
|||
reg = <0x3>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
L2: l2-cache {
|
||||
compatible = "cache";
|
||||
cache-level = <2>;
|
||||
cache-unified;
|
||||
};
|
||||
|
||||
idle-states {
|
||||
|
|
@ -121,7 +133,7 @@ zynqmp_ipi: zynqmp_ipi {
|
|||
bootph-all;
|
||||
compatible = "xlnx,zynqmp-ipi-mailbox";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 35 4>;
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
xlnx,ipi-id = <0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
|
@ -151,10 +163,10 @@ dcc: dcc {
|
|||
pmu {
|
||||
compatible = "arm,armv8-pmuv3";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 143 4>,
|
||||
<0 144 4>,
|
||||
<0 145 4>,
|
||||
<0 146 4>;
|
||||
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&cpu0>,
|
||||
<&cpu1>,
|
||||
<&cpu2>,
|
||||
|
|
@ -177,7 +189,7 @@ zynqmp_power: zynqmp-power {
|
|||
bootph-all;
|
||||
compatible = "xlnx,zynqmp-power";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 35 4>;
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
mboxes = <&ipi_mailbox_pmu1 0>, <&ipi_mailbox_pmu1 1>;
|
||||
mbox-names = "tx", "rx";
|
||||
};
|
||||
|
|
@ -221,10 +233,10 @@ modepin_gpio: gpio {
|
|||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <1 13 0xf08>,
|
||||
<1 14 0xf08>,
|
||||
<1 11 0xf08>,
|
||||
<1 10 0xf08>;
|
||||
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
fpga_full: fpga-full {
|
||||
|
|
@ -264,7 +276,7 @@ can0: can@ff060000 {
|
|||
status = "disabled";
|
||||
clock-names = "can_clk", "pclk";
|
||||
reg = <0x0 0xff060000 0x0 0x1000>;
|
||||
interrupts = <0 23 4>;
|
||||
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
tx-fifo-depth = <0x40>;
|
||||
rx-fifo-depth = <0x40>;
|
||||
|
|
@ -276,7 +288,7 @@ can1: can@ff070000 {
|
|||
status = "disabled";
|
||||
clock-names = "can_clk", "pclk";
|
||||
reg = <0x0 0xff070000 0x0 0x1000>;
|
||||
interrupts = <0 24 4>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
tx-fifo-depth = <0x40>;
|
||||
rx-fifo-depth = <0x40>;
|
||||
|
|
@ -295,11 +307,11 @@ pmu@9000 {
|
|||
compatible = "arm,cci-400-pmu,r1";
|
||||
reg = <0x9000 0x5000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 123 4>,
|
||||
<0 123 4>,
|
||||
<0 123 4>,
|
||||
<0 123 4>,
|
||||
<0 123 4>;
|
||||
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -309,7 +321,7 @@ fpd_dma_chan1: dma-controller@fd500000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd500000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 124 4>;
|
||||
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -322,7 +334,7 @@ fpd_dma_chan2: dma-controller@fd510000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd510000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 125 4>;
|
||||
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -335,7 +347,7 @@ fpd_dma_chan3: dma-controller@fd520000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd520000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 126 4>;
|
||||
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -348,7 +360,7 @@ fpd_dma_chan4: dma-controller@fd530000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd530000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 127 4>;
|
||||
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -361,7 +373,7 @@ fpd_dma_chan5: dma-controller@fd540000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd540000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 128 4>;
|
||||
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -374,7 +386,7 @@ fpd_dma_chan6: dma-controller@fd550000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd550000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 129 4>;
|
||||
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -387,7 +399,7 @@ fpd_dma_chan7: dma-controller@fd560000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd560000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 130 4>;
|
||||
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -400,7 +412,7 @@ fpd_dma_chan8: dma-controller@fd570000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xfd570000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 131 4>;
|
||||
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <128>;
|
||||
|
|
@ -417,7 +429,7 @@ gic: interrupt-controller@f9010000 {
|
|||
<0x0 0xf9060000 0x0 0x20000>;
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <1 9 0xf04>;
|
||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
|
||||
};
|
||||
|
||||
gpu: gpu@fd4b0000 {
|
||||
|
|
@ -425,8 +437,12 @@ gpu: gpu@fd4b0000 {
|
|||
compatible = "xlnx,zynqmp-mali", "arm,mali-400";
|
||||
reg = <0x0 0xfd4b0000 0x0 0x10000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 132 4>, <0 132 4>, <0 132 4>,
|
||||
<0 132 4>, <0 132 4>, <0 132 4>;
|
||||
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1";
|
||||
clock-names = "bus", "core";
|
||||
power-domains = <&zynqmp_firmware PD_GPU>;
|
||||
|
|
@ -441,7 +457,7 @@ lpd_dma_chan1: dma-controller@ffa80000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffa80000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 77 4>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -454,7 +470,7 @@ lpd_dma_chan2: dma-controller@ffa90000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffa90000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 78 4>;
|
||||
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -467,7 +483,7 @@ lpd_dma_chan3: dma-controller@ffaa0000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffaa0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 79 4>;
|
||||
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -480,7 +496,7 @@ lpd_dma_chan4: dma-controller@ffab0000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffab0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 80 4>;
|
||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -493,7 +509,7 @@ lpd_dma_chan5: dma-controller@ffac0000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffac0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 81 4>;
|
||||
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -506,7 +522,7 @@ lpd_dma_chan6: dma-controller@ffad0000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffad0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 82 4>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -519,7 +535,7 @@ lpd_dma_chan7: dma-controller@ffae0000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffae0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 83 4>;
|
||||
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -532,7 +548,7 @@ lpd_dma_chan8: dma-controller@ffaf0000 {
|
|||
compatible = "xlnx,zynqmp-dma-1.0";
|
||||
reg = <0x0 0xffaf0000 0x0 0x1000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 84 4>;
|
||||
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "clk_main", "clk_apb";
|
||||
#dma-cells = <1>;
|
||||
xlnx,bus-width = <64>;
|
||||
|
|
@ -544,7 +560,7 @@ mc: memory-controller@fd070000 {
|
|||
compatible = "xlnx,zynqmp-ddrc-2.40a";
|
||||
reg = <0x0 0xfd070000 0x0 0x30000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 112 4>;
|
||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
nand0: nand-controller@ff100000 {
|
||||
|
|
@ -553,7 +569,7 @@ nand0: nand-controller@ff100000 {
|
|||
reg = <0x0 0xff100000 0x0 0x1000>;
|
||||
clock-names = "controller", "bus";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 14 4>;
|
||||
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
iommus = <&smmu 0x872>;
|
||||
|
|
@ -564,7 +580,8 @@ gem0: ethernet@ff0b0000 {
|
|||
compatible = "xlnx,zynqmp-gem", "cdns,gem";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 57 4>, <0 57 4>;
|
||||
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff0b0000 0x0 0x1000>;
|
||||
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -579,7 +596,8 @@ gem1: ethernet@ff0c0000 {
|
|||
compatible = "xlnx,zynqmp-gem", "cdns,gem";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 59 4>, <0 59 4>;
|
||||
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff0c0000 0x0 0x1000>;
|
||||
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -594,7 +612,8 @@ gem2: ethernet@ff0d0000 {
|
|||
compatible = "xlnx,zynqmp-gem", "cdns,gem";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 61 4>, <0 61 4>;
|
||||
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff0d0000 0x0 0x1000>;
|
||||
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -609,7 +628,8 @@ gem3: ethernet@ff0e0000 {
|
|||
compatible = "xlnx,zynqmp-gem", "cdns,gem";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 63 4>, <0 63 4>;
|
||||
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff0e0000 0x0 0x1000>;
|
||||
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -626,7 +646,7 @@ gpio: gpio@ff0a0000 {
|
|||
#gpio-cells = <0x2>;
|
||||
gpio-controller;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 16 4>;
|
||||
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0x0 0xff0a0000 0x0 0x1000>;
|
||||
|
|
@ -637,7 +657,8 @@ i2c0: i2c@ff020000 {
|
|||
compatible = "cdns,i2c-r1p14";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 17 4>;
|
||||
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <400000>;
|
||||
reg = <0x0 0xff020000 0x0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -648,7 +669,8 @@ i2c1: i2c@ff030000 {
|
|||
compatible = "cdns,i2c-r1p14";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 18 4>;
|
||||
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-frequency = <400000>;
|
||||
reg = <0x0 0xff030000 0x0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -664,11 +686,11 @@ pcie: pcie@fd0e0000 {
|
|||
msi-controller;
|
||||
device_type = "pci";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 118 4>,
|
||||
<0 117 4>,
|
||||
<0 116 4>,
|
||||
<0 115 4>, /* MSI_1 [63...32] */
|
||||
<0 114 4>; /* MSI_0 [31...0] */
|
||||
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, /* MSI_1 [63...32] */
|
||||
<GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; /* MSI_0 [31...0] */
|
||||
interrupt-names = "misc", "dummy", "intx",
|
||||
"msi1", "msi0";
|
||||
msi-parent = <&pcie>;
|
||||
|
|
@ -698,7 +720,7 @@ qspi: spi@ff0f0000 {
|
|||
compatible = "xlnx,zynqmp-qspi-1.0";
|
||||
status = "disabled";
|
||||
clock-names = "ref_clk", "pclk";
|
||||
interrupts = <0 15 4>;
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
num-cs = <1>;
|
||||
reg = <0x0 0xff0f0000 0x0 0x1000>,
|
||||
|
|
@ -723,7 +745,8 @@ rtc: rtc@ffa60000 {
|
|||
status = "disabled";
|
||||
reg = <0x0 0xffa60000 0x0 0x100>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 26 4>, <0 27 4>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "alarm", "sec";
|
||||
calibration = <0x7FFF>;
|
||||
};
|
||||
|
|
@ -733,7 +756,7 @@ sata: ahci@fd0c0000 {
|
|||
status = "disabled";
|
||||
reg = <0x0 0xfd0c0000 0x0 0x2000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 133 4>;
|
||||
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
|
||||
power-domains = <&zynqmp_firmware PD_SATA>;
|
||||
resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
|
||||
iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
|
||||
|
|
@ -745,7 +768,7 @@ sdhci0: mmc@ff160000 {
|
|||
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 48 4>;
|
||||
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff160000 0x0 0x1000>;
|
||||
clock-names = "clk_xin", "clk_ahb";
|
||||
iommus = <&smmu 0x870>;
|
||||
|
|
@ -760,7 +783,7 @@ sdhci1: mmc@ff170000 {
|
|||
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 49 4>;
|
||||
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff170000 0x0 0x1000>;
|
||||
clock-names = "clk_xin", "clk_ahb";
|
||||
iommus = <&smmu 0x871>;
|
||||
|
|
@ -777,18 +800,30 @@ smmu: iommu@fd800000 {
|
|||
status = "disabled";
|
||||
#global-interrupts = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
|
||||
<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
spi0: spi@ff040000 {
|
||||
compatible = "cdns,spi-r1p6";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 19 4>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff040000 0x0 0x1000>;
|
||||
clock-names = "ref_clk", "pclk";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -800,7 +835,7 @@ spi1: spi@ff050000 {
|
|||
compatible = "cdns,spi-r1p6";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 20 4>;
|
||||
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff050000 0x0 0x1000>;
|
||||
clock-names = "ref_clk", "pclk";
|
||||
#address-cells = <1>;
|
||||
|
|
@ -812,7 +847,9 @@ ttc0: timer@ff110000 {
|
|||
compatible = "cdns,ttc";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff110000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_0>;
|
||||
|
|
@ -822,7 +859,9 @@ ttc1: timer@ff120000 {
|
|||
compatible = "cdns,ttc";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff120000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_1>;
|
||||
|
|
@ -832,7 +871,9 @@ ttc2: timer@ff130000 {
|
|||
compatible = "cdns,ttc";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
|
||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff130000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_2>;
|
||||
|
|
@ -842,7 +883,9 @@ ttc3: timer@ff140000 {
|
|||
compatible = "cdns,ttc";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
|
||||
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff140000 0x0 0x1000>;
|
||||
timer-width = <32>;
|
||||
power-domains = <&zynqmp_firmware PD_TTC_3>;
|
||||
|
|
@ -853,7 +896,7 @@ uart0: serial@ff000000 {
|
|||
compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 21 4>;
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff000000 0x0 0x1000>;
|
||||
clock-names = "uart_clk", "pclk";
|
||||
power-domains = <&zynqmp_firmware PD_UART_0>;
|
||||
|
|
@ -864,7 +907,7 @@ uart1: serial@ff010000 {
|
|||
compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 22 4>;
|
||||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xff010000 0x0 0x1000>;
|
||||
clock-names = "uart_clk", "pclk";
|
||||
power-domains = <&zynqmp_firmware PD_UART_1>;
|
||||
|
|
@ -888,8 +931,10 @@ dwc3_0: usb@fe200000 {
|
|||
compatible = "snps,dwc3";
|
||||
reg = <0x0 0xfe200000 0x0 0x40000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-names = "dwc_usb3", "otg";
|
||||
interrupts = <0 65 4>, <0 69 4>;
|
||||
interrupt-names = "host", "peripheral", "otg";
|
||||
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "bus_early", "ref";
|
||||
iommus = <&smmu 0x860>;
|
||||
snps,quirk-frame-length-adjustment = <0x20>;
|
||||
|
|
@ -915,8 +960,10 @@ dwc3_1: usb@fe300000 {
|
|||
compatible = "snps,dwc3";
|
||||
reg = <0x0 0xfe300000 0x0 0x40000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupt-names = "dwc_usb3", "otg";
|
||||
interrupts = <0 70 4>, <0 74 4>;
|
||||
interrupt-names = "host", "peripheral", "otg";
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clock-names = "bus_early", "ref";
|
||||
iommus = <&smmu 0x861>;
|
||||
snps,quirk-frame-length-adjustment = <0x20>;
|
||||
|
|
@ -929,7 +976,7 @@ watchdog0: watchdog@fd4d0000 {
|
|||
compatible = "cdns,wdt-r1p2";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 113 1>;
|
||||
interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>;
|
||||
reg = <0x0 0xfd4d0000 0x0 0x1000>;
|
||||
timeout-sec = <60>;
|
||||
reset-on-timeout;
|
||||
|
|
@ -939,7 +986,7 @@ lpd_watchdog: watchdog@ff150000 {
|
|||
compatible = "cdns,wdt-r1p2";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 52 1>;
|
||||
interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
|
||||
reg = <0x0 0xff150000 0x0 0x1000>;
|
||||
timeout-sec = <10>;
|
||||
};
|
||||
|
|
@ -948,7 +995,7 @@ xilinx_ams: ams@ffa50000 {
|
|||
compatible = "xlnx,zynqmp-ams";
|
||||
status = "disabled";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 56 4>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
reg = <0x0 0xffa50000 0x0 0x800>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -974,7 +1021,7 @@ zynqmp_dpdma: dma-controller@fd4c0000 {
|
|||
compatible = "xlnx,zynqmp-dpdma";
|
||||
status = "disabled";
|
||||
reg = <0x0 0xfd4c0000 0x0 0x1000>;
|
||||
interrupts = <0 122 4>;
|
||||
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clock-names = "axi_clk";
|
||||
power-domains = <&zynqmp_firmware PD_DP>;
|
||||
|
|
@ -990,7 +1037,7 @@ zynqmp_dpsub: display@fd4a0000 {
|
|||
<0x0 0xfd4ab000 0x0 0x1000>,
|
||||
<0x0 0xfd4ac000 0x0 0x1000>;
|
||||
reg-names = "dp", "blend", "av_buf", "aud";
|
||||
interrupts = <0 119 4>;
|
||||
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-parent = <&gic>;
|
||||
clock-names = "dp_apb_clk", "dp_aud_clk",
|
||||
"dp_vtc_pixel_clk_in";
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user