ARM: dts: vt8500: list all four timer interrupts

VIA/WonderMedia SoC timer can generate up to four interrupts corresponding
to four timer match registers (firing when the 32-bit freerunning clock
source counter matches either of the match registers, respectively).

List all four interrupts in device trees.

This also enables the system event timer to use a match register other
than 0, which can then in turn be used as a system watchdog (watchdog
function is not available on other channels)

Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20250507-vt8500-timer-updates-v2-4-65e5d1b0855e@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Alexey Charkov 2025-05-07 10:58:33 +04:00 committed by Krzysztof Kozlowski
parent 7314374c86
commit e58afb3e1f
5 changed files with 5 additions and 5 deletions

View File

@ -111,7 +111,7 @@ clkuart3: uart3 {
timer@d8130100 {
compatible = "via,vt8500-timer";
reg = <0xd8130100 0x28>;
interrupts = <36>;
interrupts = <36>, <37>, <38>, <39>;
};
ehci@d8007900 {

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@ -209,7 +209,7 @@ clksdhc: sdhc {
timer@d8130100 {
compatible = "via,vt8500-timer";
reg = <0xd8130100 0x28>;
interrupts = <36>;
interrupts = <36>, <37>, <38>, <39>;
};
ehci@d8007100 {

View File

@ -181,7 +181,7 @@ clksdhc: sdhc {
timer@d8130100 {
compatible = "via,vt8500-timer";
reg = <0xd8130100 0x28>;
interrupts = <36>;
interrupts = <36>, <37>, <38>, <39>;
};
ehci@d8007900 {

View File

@ -253,7 +253,7 @@ pwm: pwm@d8220000 {
timer@d8130100 {
compatible = "via,vt8500-timer";
reg = <0xd8130100 0x28>;
interrupts = <36>;
interrupts = <36>, <37>, <38>, <39>;
};
ehci@d8007900 {

View File

@ -240,7 +240,7 @@ pwm: pwm@d8220000 {
timer@d8130100 {
compatible = "via,vt8500-timer";
reg = <0xd8130100 0x28>;
interrupts = <36>;
interrupts = <36>, <37>, <38>, <39>;
};
ehci@d8007900 {