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ARM: dts: vt8500: list all four timer interrupts
VIA/WonderMedia SoC timer can generate up to four interrupts corresponding to four timer match registers (firing when the 32-bit freerunning clock source counter matches either of the match registers, respectively). List all four interrupts in device trees. This also enables the system event timer to use a match register other than 0, which can then in turn be used as a system watchdog (watchdog function is not available on other channels) Signed-off-by: Alexey Charkov <alchark@gmail.com> Link: https://lore.kernel.org/r/20250507-vt8500-timer-updates-v2-4-65e5d1b0855e@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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commit
e58afb3e1f
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@ -111,7 +111,7 @@ clkuart3: uart3 {
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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interrupts = <36>, <37>, <38>, <39>;
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};
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ehci@d8007900 {
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@ -209,7 +209,7 @@ clksdhc: sdhc {
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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interrupts = <36>, <37>, <38>, <39>;
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};
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ehci@d8007100 {
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@ -181,7 +181,7 @@ clksdhc: sdhc {
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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interrupts = <36>, <37>, <38>, <39>;
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};
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ehci@d8007900 {
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@ -253,7 +253,7 @@ pwm: pwm@d8220000 {
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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interrupts = <36>, <37>, <38>, <39>;
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};
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ehci@d8007900 {
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@ -240,7 +240,7 @@ pwm: pwm@d8220000 {
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timer@d8130100 {
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compatible = "via,vt8500-timer";
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reg = <0xd8130100 0x28>;
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interrupts = <36>;
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interrupts = <36>, <37>, <38>, <39>;
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};
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ehci@d8007900 {
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