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ARM: dts: vt8500: add DT nodes for the system config ID register

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Every VIA/WonderMedia SoC has a 32-bit chip ID register at the
MMIO address 0xd8120000. Add respective device tree nodes to let
the system code access it at runtime for the selection of appropriate
hardware quirks where needed.

Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-3-2daa9056fa10@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Alexey Charkov 2025-05-03 15:52:33 +04:00 committed by Krzysztof Kozlowski
parent 22488d6bd1
commit 7314374c86
5 changed files with 25 additions and 0 deletions
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5
arch/arm/boot/dts/vt8500/vt8500.dtsi
View File

@ -55,6 +55,11 @@ pinctrl: pinctrl@d8110000 {
#gpio-cells = <2>;
};
chipid@d8120000 {
compatible = "via,vt8500-scc-id";
reg = <0xd8120000 0x4>;
};
pmc@d8130000 {
compatible = "via,vt8500-pmc";
reg = <0xd8130000 0x1000>;

5
arch/arm/boot/dts/vt8500/wm8505.dtsi
View File

@ -66,6 +66,11 @@ pinctrl: pinctrl@d8110000 {
#gpio-cells = <2>;
};
chipid@d8120000 {
compatible = "via,vt8500-scc-id";
reg = <0xd8120000 0x4>;
};
pmc@d8130000 {
compatible = "via,vt8500-pmc";
reg = <0xd8130000 0x1000>;

5
arch/arm/boot/dts/vt8500/wm8650.dtsi
View File

@ -62,6 +62,11 @@ pinctrl: pinctrl@d8110000 {
#gpio-cells = <2>;
};
chipid@d8120000 {
compatible = "via,vt8500-scc-id";
reg = <0xd8120000 0x4>;
};
pmc@d8130000 {
compatible = "via,vt8500-pmc";
reg = <0xd8130000 0x1000>;

5
arch/arm/boot/dts/vt8500/wm8750.dtsi
View File

@ -68,6 +68,11 @@ pinctrl: pinctrl@d8110000 {
#gpio-cells = <2>;
};
chipid@d8120000 {
compatible = "via,vt8500-scc-id";
reg = <0xd8120000 0x4>;
};
pmc@d8130000 {
compatible = "via,vt8500-pmc";
reg = <0xd8130000 0x1000>;

5
arch/arm/boot/dts/vt8500/wm8850.dtsi
View File

@ -65,6 +65,11 @@ pinctrl: pinctrl@d8110000 {
#gpio-cells = <2>;
};
chipid@d8120000 {
compatible = "via,vt8500-scc-id";
reg = <0xd8120000 0x4>;
};
pmc@d8130000 {
compatible = "via,vt8500-pmc";
reg = <0xd8130000 0x1000>;