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arm64: dts: mediatek: mt8186: Add and use UART AP_DMA controller

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This SoC has a DMA controller (AP_DMA) that provides one channel
for each data direction (transmit and receive) for all of the
UART controllers in the SoC.

In order to increase the efficiency of data TX/RX over the UART
controllers, add the UART DMA controller and assign the right
channels to each of the three UART controllers.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
AngeloGioacchino Del Regno 2026-07-09 11:09:21 +02:00
parent 5551862f57
commit e3999d8e4c
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GPG Key ID: 9A3604CFAD978478
1 changed files with 22 additions and 0 deletions
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22
arch/arm64/boot/dts/mediatek/mt8186.dtsi
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@ -1142,6 +1142,22 @@ systimer: timer@10017000 {
clocks = <&clk13m>;
};
apdma: dma-controller@10200d80 {
compatible = "mediatek,mt8186-uart-dma", "mediatek,mt6835-uart-dma";
reg = <0 0x10200d80 0 0x80>, <0 0x10200e00 0 0x80>,
<0 0x10200e80 0 0x80>, <0 0x10200f00 0 0x80>,
<0 0x10200f80 0 0x80>, <0 0x10201000 0 0x80>;
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&infracfg_ao CLK_INFRA_AO_AP_DMA>;
#dma-cells = <1>;
dma-requests = <6>;
};
gce: mailbox@1022c000 {
compatible = "mediatek,mt8186-gce";
reg = <0 0X1022c000 0 0x4000>;
@ -1218,6 +1234,8 @@ uart0: serial@11002000 {
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_AO_UART0>;
clock-names = "baud", "bus";
dmas = <&apdma 0>, <&apdma 1>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1228,6 +1246,8 @@ uart1: serial@11003000 {
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_AO_UART1>;
clock-names = "baud", "bus";
dmas = <&apdma 2>, <&apdma 3>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1482,6 +1502,8 @@ uart2: serial@11018000 {
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&clk26m>, <&infracfg_ao CLK_INFRA_AO_UART2>;
clock-names = "baud", "bus";
dmas = <&apdma 4>, <&apdma 5>;
dma-names = "tx", "rx";
status = "disabled";
};