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arm64: dts: mediatek: mt8183: Add and use UART AP_DMA controller

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This SoC has a DMA controller (AP_DMA) that provides one channel
for each data direction (transmit and receive) for all of the
UART controllers in the SoC.

In order to increase the efficiency of data TX/RX over the UART
controllers, add the UART DMA controller and assign the right
channels to each of the three UART controllers.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
This commit is contained in:
AngeloGioacchino Del Regno 2026-07-09 11:09:20 +02:00
parent b6db6e4b4b
commit 5551862f57
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GPG Key ID: 9A3604CFAD978478
1 changed files with 22 additions and 0 deletions
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22
arch/arm64/boot/dts/mediatek/mt8183.dtsi
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@ -1071,6 +1071,22 @@ gce: mailbox@10238000 {
clock-names = "gce";
};
apdma: dma-controller@11000780 {
compatible = "mediatek,mt8183-uart-dma", "mediatek,mt6577-uart-dma";
reg = <0 0x11000780 0 0x80>, <0 0x11000800 0 0x80>,
<0 0x11000880 0 0x80>, <0 0x11000900 0 0x80>,
<0 0x11000980 0 0x80>, <0 0x11000a00 0 0x80>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_AP_DMA>;
#dma-cells = <1>;
dma-requests = <6>;
};
auxadc: auxadc@11001000 {
compatible = "mediatek,mt8183-auxadc",
"mediatek,mt8173-auxadc";
@ -1088,6 +1104,8 @@ uart0: serial@11002000 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>;
clock-names = "baud", "bus";
dmas = <&apdma 0>, <&apdma 1>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1098,6 +1116,8 @@ uart1: serial@11003000 {
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
clocks = <&clk26m>, <&infracfg CLK_INFRA_UART1>;
clock-names = "baud", "bus";
dmas = <&apdma 2>, <&apdma 3>;
dma-names = "tx", "rx";
status = "disabled";
};
@ -1108,6 +1128,8 @@ uart2: serial@11004000 {
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
clocks = <&clk26m>, <&infracfg CLK_INFRA_UART2>;
clock-names = "baud", "bus";
dmas = <&apdma 4>, <&apdma 5>;
dma-names = "tx", "rx";
status = "disabled";
};