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New board: FriendlyElec NanoPi M5

Browse Source 
Camera support for the PinePhone Pro.
 A bunch of cleanups to make DTC happier, fix ordering of DMA uart
 channels on rk3528 and some video output enablement as well as some
 button definitions.
 An interesting tidbit is the reset behaviour addition in that some
 boards have specific requirements as to how the PMIC needs to do the
 restart. DT-maintainers did not consider the header with helper-constants
 as part of the binding, so that header ended up in the Rockchip directory
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Merge tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New board: FriendlyElec NanoPi M5
Camera support for the PinePhone Pro.
A bunch of cleanups to make DTC happier, fix ordering of DMA uart
channels on rk3528 and some video output enablement as well as some
button definitions.
An interesting tidbit is the reset behaviour addition in that some
boards have specific requirements as to how the PMIC needs to do the
restart. DT-maintainers did not consider the header with helper-constants
as part of the binding, so that header ended up in the Rockchip directory

* tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
  arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5C
  arm64: dts: rockchip: Drop regulator-compatible property on rk3399
  arm64: dts: rockchip: Drop unneeded address+size-cells on px30
  arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2
  arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtso
  arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso
  arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards
  arm64: dts: rockchip: Simplify VOP port definition on rk3328
  arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards
  arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards
  arm64: dts: rockchip: Fix UART DMA support for RK3528
  arm64: dts: rockchip: Add reset button to NanoPi R5S
  arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C
  arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro
  arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro
  arm64: dts: rockchip: Fix pinctrl node names for RK3528
  arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
  dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
  arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger
  arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar
  ...

Link: https://lore.kernel.org/r/11552292.NyiUUSuA9g@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2025-07-22 23:00:24 +02:00
commit dd9f821369
36 changed files with 1388 additions and 109 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/arm/rockchip.yaml
View File

@ -300,6 +300,12 @@ properties:
- friendlyarm,nanopi-r4s-enterprise
- const: rockchip,rk3399
- description: FriendlyElec NanoPi M5 series boards
items:
- enum:
- friendlyarm,nanopi-m5
- const: rockchip,rk3576
- description: FriendlyElec NanoPi R5 series boards
items:
- enum:

1
arch/arm64/boot/dts/rockchip/Makefile
View File

@ -148,6 +148,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5-v1.2-wifibt.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-luckfox-omni3576.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-nanopi-m5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-roc-pc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-rock-4d.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb

2
arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w-a2.dts
View File

@ -12,6 +12,8 @@ / {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {

2
arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3146w.dts
View File

@ -12,6 +12,8 @@ / {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {

2
arch/arm64/boot/dts/rockchip/px30-cobra-ltk050h3148w.dts
View File

@ -12,6 +12,8 @@ / {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {

2
arch/arm64/boot/dts/rockchip/px30-cobra-ltk500hd1829.dts
View File

@ -16,6 +16,8 @@ aliases {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {

2
arch/arm64/boot/dts/rockchip/px30-evb.dts
View File

@ -124,6 +124,8 @@ &display_subsystem {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ports {

2
arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3146w-a2.dts
View File

@ -12,6 +12,8 @@ / {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {

2
arch/arm64/boot/dts/rockchip/px30-pp1516-ltk050h3148w.dts
View File

@ -12,6 +12,8 @@ / {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {

6
arch/arm64/boot/dts/rockchip/px30.dtsi
View File

@ -351,8 +351,6 @@ power-domain@PX30_PD_GPU {
pmugrf: syscon@ff010000 {
compatible = "rockchip,px30-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xff010000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
pmu_io_domains: io-domains {
compatible = "rockchip,px30-pmu-io-voltage-domain";
@ -453,8 +451,6 @@ gic: interrupt-controller@ff131000 {
grf: syscon@ff140000 {
compatible = "rockchip,px30-grf", "syscon", "simple-mfd";
reg = <0x0 0xff140000 0x0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
io_domains: io-domains {
compatible = "rockchip,px30-io-voltage-domain";
@ -1137,8 +1133,6 @@ dsi: dsi@ff450000 {
resets = <&cru SRST_MIPIDSI_HOST_P>;
reset-names = "apb";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {

2
arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dtsi
View File

@ -118,6 +118,8 @@ &display_subsystem {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ports {

2
arch/arm64/boot/dts/rockchip/rk3326-gameforce-chi.dts
View File

@ -322,6 +322,8 @@ &display_subsystem {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
internal_display: panel@0 {

2
arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
View File

@ -220,6 +220,8 @@ &display_subsystem {
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ports {

6
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@ -731,11 +731,7 @@ vop: vop@ff370000 {
status = "disabled";
vop_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_out_hdmi: endpoint@0 {
reg = <0>;
vop_out_hdmi: endpoint {
remote-endpoint = <&hdmi_in_vop>;
};
};

4
arch/arm64/boot/dts/rockchip/rk3399-base.dtsi
View File

@ -2071,8 +2071,6 @@ mipi_dsi: dsi@ff960000 {
resets = <&cru SRST_P_MIPI_DSI0>;
reset-names = "apb";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
@ -2112,8 +2110,6 @@ mipi_dsi1: dsi@ff968000 {
resets = <&cru SRST_P_MIPI_DSI1>;
reset-names = "apb";
rockchip,grf = <&grf>;
#address-cells = <1>;
#size-cells = <0>;
#phy-cells = <0>;
status = "disabled";

15
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi
View File

@ -250,18 +250,11 @@ &edp {
*/
assigned-clocks = <&cru PCLK_EDP>;
assigned-clock-rates = <24000000>;
};
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
&edp_out {
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};

4
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet.dtsi
View File

@ -627,8 +627,10 @@ &mipi_dphy_rx0 {
};
&mipi_dsi {
status = "okay";
clock-master;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ports {
mipi_out: port@1 {

2
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts
View File

@ -211,7 +211,6 @@ &i2c0 {
vdd_cpu_b: syr827@40 {
compatible = "silergy,syr827";
reg = <0x40>;
regulator-compatible = "fan53555-reg";
pinctrl-0 = <&vsel1_pin>;
regulator-name = "vdd_cpu_b";
regulator-min-microvolt = <712500>;
@ -229,7 +228,6 @@ regulator-state-mem {
vdd_gpu: syr828@41 {
compatible = "silergy,syr828";
reg = <0x41>;
regulator-compatible = "fan53555-reg";
pinctrl-0 = <&vsel2_pin>;
regulator-name = "vdd_gpu";
regulator-min-microvolt = <712500>;

15
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
View File

@ -404,18 +404,11 @@ &edp {
pinctrl-names = "default";
pinctrl-0 = <&edp_hpd>;
status = "okay";
};
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
&edp_out {
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};

141
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
View File

@ -104,6 +104,16 @@ vcc_sys: regulator-vcc-sys {
regulator-boot-on;
};
avdd2v8_dvp: regulator-avdd2v8-dvp {
compatible = "regulator-fixed";
regulator-name = "avdd2v8_dvp";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
vin-supply = <&vcc3v3_sys>;
};
vcc3v3_sys: regulator-vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@ -136,6 +146,16 @@ vcc1v8_codec: regulator-vcc1v8-codec {
vin-supply = <&vcc3v3_sys>;
};
vcc1v2_dvp: regulator-vcc1v2-dvp {
compatible = "regulator-fixed";
regulator-name = "vcc1v2_dvp";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vcca1v8_s3>;
};
wifi_pwrseq: sdio-wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk818 1>;
@ -312,6 +332,8 @@ vcc3v0_touch: LDO_REG2 {
vcca1v8_codec: LDO_REG3 {
regulator-name = "vcca1v8_codec";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
@ -420,6 +442,67 @@ regulator-state-mem {
};
};
&i2c1 {
assigned-clocks = <&cru SCLK_CIF_OUT>;
assigned-clock-rates = <24000000>;
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_xfer &cif_clkouta>;
status = "okay";
wcam: camera@1a {
compatible = "sony,imx258";
reg = <0x1a>;
clocks = <&cru SCLK_CIF_OUT>; /* MIPI_MCLK0, derived from CIF_CLKO */
lens-focus = <&wcam_lens>;
orientation = <1>; /* V4L2_CAMERA_ORIENTATION_BACK */
pinctrl-names = "default";
pinctrl-0 = <&camera_rst_l>;
reset-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
rotation = <270>;
/* Note: both cameras also depend on vcca1v8_codec to power the I2C bus. */
vif-supply = <&vcc1v8_dvp>;
vana-supply = <&avdd2v8_dvp>;
vdig-supply = <&vcc1v2_dvp>; /* DVDD_DVP is the same as VCC1V2_DVP */
port {
wcam_out: endpoint {
data-lanes = <1 2 3 4>;
link-frequencies = /bits/ 64 <636000000>;
remote-endpoint = <&mipi_in_wcam>;
};
};
};
wcam_lens: camera-lens@c {
compatible = "dongwoon,dw9714";
reg = <0x0c>;
/* Same I2c bus as both cameras, depends on vcca1v8_codec for power. */
vcc-supply = <&vcc1v8_dvp>;
};
ucam: camera@36 {
compatible = "ovti,ov8858";
reg = <0x36>;
clocks = <&cru SCLK_CIF_OUT>; /* MIPI_MCLK1, derived from CIF_CLK0 */
clock-names = "xvclk";
dovdd-supply = <&vcc1v8_dvp>;
orientation = <0>; /* V4L2_CAMERA_ORIENTATION_FRONT */
pinctrl-names = "default";
pinctrl-0 = <&camera2_rst_l &dvp_pdn0_h>;
powerdown-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
rotation = <90>;
port {
ucam_out: endpoint {
data-lanes = <1 2 3 4>;
remote-endpoint = <&mipi_in_ucam>;
};
};
};
};
&i2c3 {
i2c-scl-rising-time-ns = <450>;
i2c-scl-falling-time-ns = <15>;
@ -462,8 +545,50 @@ &io_domains {
status = "okay";
};
&isp0 {
status = "okay";
ports {
port@0 {
mipi_in_ucam: endpoint@0 {
reg = <0>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&ucam_out>;
};
};
};
};
&isp0_mmu {
status = "okay";
};
&isp1 {
status = "okay";
ports {
port@0 {
mipi_in_wcam: endpoint@0 {
reg = <0>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&wcam_out>;
};
};
};
};
&mipi_dphy_rx0 {
status = "okay";
};
&isp1_mmu {
status = "okay";
};
&mipi_dsi {
clock-master;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {
@ -490,6 +615,10 @@ mipi_out_panel: endpoint {
};
};
&mipi_dsi1 {
status = "okay";
};
&pmu_io_domains {
pmu1830-supply = <&vcc_1v8>;
status = "okay";
@ -508,6 +637,18 @@ lcd1_rst_pin: lcd1-rst-pin {
};
};
cameras {
camera_rst_l: camera-rst-l {
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
camera2_rst_l: camera2-rst-l {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
dvp_pdn0_h: dvp-pdn0-h {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
leds {
red_led_pin: red-led-pin {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;

12
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso
View File

@ -124,12 +124,6 @@ pca9670: gpio@27 {
};
};
&mipi_out {
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
&mipi_dsi {
#address-cells = <1>;
#size-cells = <0>;
@ -151,6 +145,12 @@ mipi_in_panel: endpoint {
};
};
&mipi_out {
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
&pinctrl {
pca9670 {
pca9670_resetn: pca9670-resetn {

2
arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts
View File

@ -421,7 +421,6 @@ vdd_cpu_b: regulator@40 {
compatible = "silergy,syr827";
reg = <0x40>;
fcs,suspend-voltage-selector = <1>;
regulator-compatible = "fan53555-reg";
pinctrl-0 = <&vsel1_gpio>;
vsel-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
regulator-name = "vdd_cpu_b";
@ -440,7 +439,6 @@ vdd_gpu: regulator@41 {
compatible = "silergy,syr828";
reg = <0x41>;
fcs,suspend-voltage-selector = <1>;
regulator-compatible = "fan53555-reg";
pinctrl-0 = <&vsel2_gpio>;
vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
regulator-name = "vdd_gpu";

22
arch/arm64/boot/dts/rockchip/rk3399-rockpro64-screen.dtso
View File

@ -47,25 +47,11 @@ touch: touchscreen@5d {
};
&mipi_dsi {
clock-master;
#address-cells = <1>;
#size-cells = <0>;
clock-master;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
mipi_out: port@1 {
reg = <1>;
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
};
mipi_panel: panel@0 {
compatible = "feiyang,fy07024di26a30d";
reg = <0>;
@ -81,6 +67,12 @@ mipi_in_panel: endpoint {
};
};
&mipi_out {
mipi_out_panel: endpoint {
remote-endpoint = <&mipi_in_panel>;
};
};
&pwm0 {
status = "okay";
};

18
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
View File

@ -142,21 +142,13 @@ sdio_pwrseq: sdio-pwrseq {
&edp {
status = "okay";
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&edp_out {
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
&i2c1 {
i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;

20
arch/arm64/boot/dts/rockchip/rk3528-pinctrl.dtsi
View File

@ -98,42 +98,42 @@ eth_pins: eth-pins {
fephy {
/omit-if-no-ref/
fephym0_led_dpx: fephym0-led_dpx {
fephym0_led_dpx: fephym0-led-dpx {
rockchip,pins =
/* fephy_led_dpx_m0 */
<4 RK_PB5 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
fephym0_led_link: fephym0-led_link {
fephym0_led_link: fephym0-led-link {
rockchip,pins =
/* fephy_led_link_m0 */
<4 RK_PC0 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
fephym0_led_spd: fephym0-led_spd {
fephym0_led_spd: fephym0-led-spd {
rockchip,pins =
/* fephy_led_spd_m0 */
<4 RK_PB7 2 &pcfg_pull_none>;
};
/omit-if-no-ref/
fephym1_led_dpx: fephym1-led_dpx {
fephym1_led_dpx: fephym1-led-dpx {
rockchip,pins =
/* fephy_led_dpx_m1 */
<2 RK_PA4 5 &pcfg_pull_none>;
};
/omit-if-no-ref/
fephym1_led_link: fephym1-led_link {
fephym1_led_link: fephym1-led-link {
rockchip,pins =
/* fephy_led_link_m1 */
<2 RK_PA6 5 &pcfg_pull_none>;
};
/omit-if-no-ref/
fephym1_led_spd: fephym1-led_spd {
fephym1_led_spd: fephym1-led-spd {
rockchip,pins =
/* fephy_led_spd_m1 */
<2 RK_PA5 5 &pcfg_pull_none>;
@ -779,7 +779,7 @@ rgmii_miim: rgmii-miim {
};
/omit-if-no-ref/
rgmii_rx_bus2: rgmii-rx_bus2 {
rgmii_rx_bus2: rgmii-rx-bus2 {
rockchip,pins =
/* rgmii_rxd0 */
<3 RK_PA3 2 &pcfg_pull_none>,
@ -790,7 +790,7 @@ rgmii_rx_bus2: rgmii-rx_bus2 {
};
/omit-if-no-ref/
rgmii_tx_bus2: rgmii-tx_bus2 {
rgmii_tx_bus2: rgmii-tx-bus2 {
rockchip,pins =
/* rgmii_txd0 */
<3 RK_PA1 2 &pcfg_pull_none_drv_level_2>,
@ -801,7 +801,7 @@ rgmii_tx_bus2: rgmii-tx_bus2 {
};
/omit-if-no-ref/
rgmii_rgmii_clk: rgmii-rgmii_clk {
rgmii_rgmii_clk: rgmii-rgmii-clk {
rockchip,pins =
/* rgmii_rxclk */
<3 RK_PA5 2 &pcfg_pull_none>,
@ -810,7 +810,7 @@ rgmii_rgmii_clk: rgmii-rgmii_clk {
};
/omit-if-no-ref/
rgmii_rgmii_bus: rgmii-rgmii_bus {
rgmii_rgmii_bus: rgmii-rgmii-bus {
rockchip,pins =
/* rgmii_rxd2 */
<3 RK_PA7 2 &pcfg_pull_none>,

16
arch/arm64/boot/dts/rockchip/rk3528.dtsi
View File

@ -595,7 +595,7 @@ uart0: serial@ff9f0000 {
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 8>, <&dmac 9>;
dmas = <&dmac 9>, <&dmac 8>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -607,7 +607,7 @@ uart1: serial@ff9f8000 {
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 10>, <&dmac 11>;
dmas = <&dmac 11>, <&dmac 10>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -619,7 +619,7 @@ uart2: serial@ffa00000 {
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 12>, <&dmac 13>;
dmas = <&dmac 13>, <&dmac 12>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -631,7 +631,7 @@ uart3: serial@ffa08000 {
clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 14>, <&dmac 15>;
dmas = <&dmac 15>, <&dmac 14>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -643,7 +643,7 @@ uart4: serial@ffa10000 {
clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 16>, <&dmac 17>;
dmas = <&dmac 17>, <&dmac 16>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -655,7 +655,7 @@ uart5: serial@ffa18000 {
clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 18>, <&dmac 19>;
dmas = <&dmac 19>, <&dmac 18>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -667,7 +667,7 @@ uart6: serial@ffa20000 {
clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 20>, <&dmac 21>;
dmas = <&dmac 21>, <&dmac 20>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";
@ -679,7 +679,7 @@ uart7: serial@ffa28000 {
clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>;
clock-names = "baudclk", "apb_pclk";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac 22>, <&dmac 23>;
dmas = <&dmac 23>, <&dmac 22>;
reg-io-width = <4>;
reg-shift = <2>;
status = "disabled";

6
arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
View File

@ -282,11 +282,11 @@ lcd: panel@0 {
reg = <0>;
backlight = <&backlight>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
rotation = <90>;
power-supply = <&vcc_3v3>;
rotation = <90>;
port@0 {
panel_in_dsi: endpoint@0 {
port {
panel_in_dsi: endpoint {
remote-endpoint = <&dsi0_out_con>;
};
};

66
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts
View File

@ -22,6 +22,15 @@ aliases {
mmc1 = &sdhci;
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <20 220>;
default-brightness-level = <100>;
num-interpolated-steps = <200>;
power-supply = <&vcc3v3_sys>;
pwms = <&pwm4 0 25000 0>;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
};
@ -184,6 +193,47 @@ &cpu3 {
cpu-supply = <&vdd_cpu>;
};
&dsi0 {
clock-master;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
panel@0 {
compatible = "wanchanglong,w552793baa", "raydium,rm67200";
reg = <0>;
backlight = <&backlight>;
iovcc-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
vdd-supply = <&vcc3v3_lcd0_n>;
vsn-supply = <&vcc5v0_sys>;
vsp-supply = <&vcc5v0_sys>;
port {
panel_in_dsi: endpoint {
remote-endpoint = <&dsi0_out_panel>;
};
};
};
};
&dsi0_in {
dsi0_in_vp1: endpoint {
remote-endpoint = <&vp1_out_dsi0>;
};
};
&dsi0_out {
dsi0_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
&dsi_dphy0 {
status = "okay";
};
&gmac0 {
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
@ -581,6 +631,10 @@ &pmu_io_domains {
status = "okay";
};
&pwm4 {
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "okay";
@ -672,8 +726,9 @@ &usb2phy1_otg {
};
&vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
assigned-clocks = <&cru DCLK_VOP0>, <&cru PLL_VPLL>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&xin24m>, <&cru PLL_VPLL>;
assigned-clock-rates = <0>, <132000000>, <132000000>;
status = "okay";
};
@ -687,3 +742,10 @@ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
remote-endpoint = <&hdmi_in_vp0>;
};
};
&vp1 {
vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
reg = <ROCKCHIP_VOP2_EP_MIPI0>;
remote-endpoint = <&dsi0_in_vp1>;
};
};

19
arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
View File

@ -17,6 +17,19 @@ aliases {
ethernet0 = &gmac0;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&gpio4_a0_k1_pin>;
pinctrl-names = "default";
button-reset {
debounce-interval = <50>;
gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
label = "RESET";
linux,code = <KEY_RESTART>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -127,6 +140,12 @@ eth_phy0_reset_pin: eth-phy0-reset-pin {
};
};
gpio-keys {
gpio4_a0_k1_pin: gpio4-a0-k1-pin {
rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
gpio-leds {
lan1_led_pin: lan1-led-pin {
rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;

15
arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dtsi
View File

@ -18,12 +18,27 @@ / {
aliases {
mmc0 = &sdmmc0;
mmc1 = &sdhci;
rtc0 = &hym8563;
};
chosen: chosen {
stdout-path = "serial2:1500000n8";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
button-maskrom {
label = "MASKROM";
linux,code = <KEY_SETUP>;
press-threshold-microvolt = <0>;
};
};
hdmi-con {
compatible = "hdmi-connector";
type = "a";

941
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts Normal file
View File

@ -0,0 +1,941 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2025 FriendlyElec Computer Tech. Co., Ltd.
* Copyright (c) 2025 John Clark <inindev@gmail.com>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include <dt-bindings/usb/pd.h>
#include "rk3576.dtsi"
/ {
model = "FriendlyElec NanoPi M5";
compatible = "friendlyarm,nanopi-m5", "rockchip,rk3576";
aliases {
ethernet0 = &gmac0;
ethernet1 = &gmac1;
mmc0 = &sdmmc;
};
chosen {
stdout-path = "serial0:1500000n8";
};
hdmi-con {
compatible = "hdmi-connector";
hdmi-pwr-supply = <&vcc5v_hdmi_tx>;
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
keys {
compatible = "gpio-keys";
usr_button: key-1 {
debounce-interval = <50>;
gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
label = "user";
linux,code = <BTN_1>;
pinctrl-names = "default";
pinctrl-0 = <&usr_button_l>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
led_sys: led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_HEARTBEAT;
gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
label = "sys";
linux,default-trigger = "heartbeat";
pinctrl-names = "default";
pinctrl-0 = <&led_sys_h>;
};
led1: led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
label = "led1";
linux,default-trigger = "netdev";
pinctrl-names = "default";
pinctrl-0 = <&led1_h>;
};
led2: led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
gpios = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
label = "led2";
linux,default-trigger = "netdev";
pinctrl-names = "default";
pinctrl-0 = <&led2_h>;
};
};
usb3_port2_5v: regulator-usb3-port2-5v {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_host_pwren_h>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "usb3_port2_5v";
vin-supply = <&vcc5v0_sys_s5>;
};
vcc12v_dcin: regulator-vcc12v-dcin {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-name = "vcc12v_dcin";
};
vcc3v3_m2_keym: regulator-vcc3v3-m2-keym {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pwren_h>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_m2_keym";
vin-supply = <&vcc5v0_sys_s5>;
};
vcc3v3_sd_s0: regulator-vcc3v3-sd-s0 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_pwren_h>;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_sd_s0";
vin-supply = <&vcc_3v3_s3>;
};
vcc5v0_sys_s5: regulator-vcc5v0-sys-s5 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc5v0_sys_s5";
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_usb_otg0: regulator-vcc5v0-usb-otg0 {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_otg0_pwren_h>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc5v0_usb_otg0";
vin-supply = <&vcc5v0_sys_s5>;
};
vcc5v_hdmi_tx: regulator-vcc5v-hdmi-tx {
compatible = "regulator-fixed";
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc5v_hdmi_tx";
vin-supply = <&vcc5v0_sys_s5>;
};
vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vcc_1v1_nldo_s3";
vin-supply = <&vcc5v0_sys_s5>;
};
vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-name = "vcc_2v0_pldo_s3";
vin-supply = <&vcc5v0_sys_s5>;
};
vcc_3v3_s0: regulator-vcc-3v3-s0 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_s0";
vin-supply = <&vcc_3v3_s3>;
};
sound {
compatible = "simple-audio-card";
pinctrl-names = "default";
pinctrl-0 = <&hp_det_l>;
simple-audio-card,format = "i2s";
simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "realtek,rt5616-codec";
simple-audio-card,routing =
"Headphones", "HPOL",
"Headphones", "HPOR",
"IN1P", "Microphone Jack";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Microphone", "Microphone Jack";
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
simple-audio-card,cpu {
sound-dai = <&sai2>;
};
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_psu {
status = "okay";
};
&cpu_b0 {
cpu-supply = <&vdd_cpu_big_s0>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu_big_s0>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu_big_s0>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu_big_s0>;
};
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
&fspi1m1_pins {
/* gpio1_d5, gpio1_c4-c7 (clk, d0-d4) are for spi nor flash */
/* gpio1_d0-d4 muxed to sai2 audio functions */
rockchip,pins =
<1 RK_PD5 3 &pcfg_pull_none>,
<1 RK_PC4 3 &pcfg_pull_none>,
<1 RK_PC5 3 &pcfg_pull_none>,
<1 RK_PC6 3 &pcfg_pull_none>,
<1 RK_PC7 3 &pcfg_pull_none>;
};
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy0>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3_s3>;
pinctrl-names = "default";
pinctrl-0 = <&eth0m0_miim>,
<&eth0m0_tx_bus2>,
<&eth0m0_rx_bus2>,
<&eth0m0_rgmii_clk>,
<&eth0m0_rgmii_bus>;
status = "okay";
};
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
phy-mode = "rgmii-id";
phy-supply = <&vcc_3v3_s3>;
pinctrl-names = "default";
pinctrl-0 = <&eth1m0_miim>,
<&eth1m0_tx_bus2>,
<&eth1m0_rx_bus2>,
<&eth1m0_rgmii_clk>,
<&eth1m0_rgmii_bus>;
status = "okay";
};
&gpu {
mali-supply = <&vdd_gpu_s0>;
status = "okay";
};
&hdmi {
status = "okay";
};
&hdmi_in {
hdmi_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi>;
};
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&hdptxphy {
status = "okay";
};
&i2c1 {
status = "okay";
pmic@23 {
compatible = "rockchip,rk806";
reg = <0x23>;
#gpio-cells = <2>;
gpio-controller;
interrupt-parent = <&gpio0>;
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
<&rk806_dvs2_null>, <&rk806_dvs3_null>;
system-power-controller;
vcc1-supply = <&vcc5v0_sys_s5>;
vcc2-supply = <&vcc5v0_sys_s5>;
vcc3-supply = <&vcc5v0_sys_s5>;
vcc4-supply = <&vcc5v0_sys_s5>;
vcc5-supply = <&vcc5v0_sys_s5>;
vcc6-supply = <&vcc5v0_sys_s5>;
vcc7-supply = <&vcc5v0_sys_s5>;
vcc8-supply = <&vcc5v0_sys_s5>;
vcc9-supply = <&vcc5v0_sys_s5>;
vcc10-supply = <&vcc5v0_sys_s5>;
vcc11-supply = <&vcc_2v0_pldo_s3>;
vcc12-supply = <&vcc5v0_sys_s5>;
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc5v0_sys_s5>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun0";
};
rk806_dvs1_slp: dvs1-slp-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun1";
};
rk806_dvs1_pwrdn: dvs1-pwrdn-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun2";
};
rk806_dvs1_rst: dvs1-rst-pins {
pins = "gpio_pwrctrl1";
function = "pin_fun3";
};
rk806_dvs2_null: dvs2-null-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun0";
};
rk806_dvs2_slp: dvs2-slp-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun1";
};
rk806_dvs2_pwrdn: dvs2-pwrdn-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun2";
};
rk806_dvs2_rst: dvs2-rst-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun3";
};
rk806_dvs2_dvs: dvs2-dvs-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun4";
};
rk806_dvs2_gpio: dvs2-gpio-pins {
pins = "gpio_pwrctrl2";
function = "pin_fun5";
};
rk806_dvs3_null: dvs3-null-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun0";
};
rk806_dvs3_slp: dvs3-slp-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun1";
};
rk806_dvs3_pwrdn: dvs3-pwrdn-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun2";
};
rk806_dvs3_rst: dvs3-rst-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun3";
};
rk806_dvs3_dvs: dvs3-dvs-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun4";
};
rk806_dvs3_gpio: dvs3-gpio-pins {
pins = "gpio_pwrctrl3";
function = "pin_fun5";
};
regulators {
vdd_cpu_big_s0: dcdc-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-enable-ramp-delay = <400>;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-name = "vdd_cpu_big_s0";
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_npu_s0: dcdc-reg2 {
regulator-boot-on;
regulator-enable-ramp-delay = <400>;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-name = "vdd_npu_s0";
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_cpu_lit_s0: dcdc-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <950000>;
regulator-name = "vdd_cpu_lit_s0";
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vcc_3v3_s3: dcdc-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vdd_gpu_s0: dcdc-reg5 {
regulator-boot-on;
regulator-enable-ramp-delay = <400>;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdd_gpu_s0";
regulator-ramp-delay = <12500>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <850000>;
};
};
vddq_ddr_s0: dcdc-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vddq_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_logic_s0: dcdc-reg7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <800000>;
regulator-name = "vdd_logic_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8_s3: dcdc-reg8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd2_ddr_s3: dcdc-reg9 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd2_ddr_s3";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_ddr_s0: dcdc-reg10 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <550000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vdd_ddr_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_1v8_s0: pldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca_1v8_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pldo2_s0: pldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pldo2_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_1v2_s0: pldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vdda_1v2_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_3v3_s0: pldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcca_3v3_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd_s0: pldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pldo6_s3: pldo-reg6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pldo6_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_0v75_s3: nldo-reg1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdd_0v75_s3";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <750000>;
};
};
vdda_ddr_pll_s0: nldo-reg2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdda_ddr_pll_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v75_hdmi_s0: nldo-reg3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <837500>;
regulator-max-microvolt = <837500>;
regulator-name = "vdda0v75_hdmi_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v85_s0: nldo-reg4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-name = "vdda_0v85_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v75_s0: nldo-reg5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
regulator-name = "vdda_0v75_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2c2 {
status = "okay";
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-output-names = "hym8563";
interrupt-parent = <&gpio0>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
wakeup-source;
};
};
&i2c5 {
clock-frequency = <200000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c5m3_xfer>;
status = "okay";
rt5616: audio-codec@1b {
compatible = "realtek,rt5616";
reg = <0x1b>;
assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
assigned-clock-rates = <12288000>;
clocks = <&cru CLK_SAI2_MCLKOUT>;
clock-names = "mclk";
#sound-dai-cells = <0>;
};
};
&mdio0 {
rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
interrupt-parent = <&gpio2>;
interrupts = <RK_PB1 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_int>, <&gmac0_rst>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
};
};
&mdio1 {
rgmii_phy1: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC1_OUT>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1_int>, <&gmac1_rst>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_perstn>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_m2_keym>;
status = "okay";
};
&pinctrl {
gmac {
gmac0_int: gmac0-int {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
gmac0_rst: gmac0-rst {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
gmac1_int: gmac1-int {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
gmac1_rst: gmac1-rst {
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
keys {
usr_button_l: usr-button-l {
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
led_sys_h: led-sys-h {
rockchip,pins = <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
led1_h: led1-h {
rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
led2_h: led2-h {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie0_pwren_h: pcie0-pwren-h {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie0_perstn: pcie0-perstn {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc0_pwren_h: sdmmc0-pwren-h {
rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sound {
hp_det_l: hp-det-l {
rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb3_host_pwren_h: usb3-host-pwren-h {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_otg0_pwren_h: usb-otg0-pwren-h {
rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sai2 {
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8_s0>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
no-mmc;
no-sdio;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_det>, <&sdmmc0_bus4>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vcc3v3_sd_s0>;
status = "okay";
};
&sfc1 {
pinctrl-names = "default";
pinctrl-0 = <&fspi1m1_csn0>, <&fspi1m1_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
m25p,fast-read;
spi-max-frequency = <50000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
vcc-supply = <&vcc_1v8_s3>;
};
};
&u2phy0 {
status = "okay";
};
&u2phy0_otg {
phy-supply = <&vcc5v0_usb_otg0>;
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy1_otg {
phy-supply = <&usb3_port2_5v>;
status = "okay";
};
&uart0 {
status = "okay";
};
&usbdp_phy {
status = "okay";
};
&usb_drd0_dwc3 {
dr_mode = "otg";
extcon = <&u2phy0>;
status = "okay";
};
&usb_drd1_dwc3 {
dr_mode = "host";
status = "okay";
};
&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};
&vp0 {
vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi_in_vp0>;
};
};
&wdt {
status = "okay";
};

101
arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts
View File

@ -37,6 +37,14 @@ hdmi_con_in: endpoint {
};
};
rfkill {
compatible = "rfkill-gpio";
pinctrl-names = "default";
pinctrl-0 = <&wifi_en_h>;
radio-type = "wlan";
shutdown-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
};
leds: leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@ -57,13 +65,13 @@ user-led {
};
};
vcc_12v0_dcin: regulator-vcc-12v0-dcin {
vcc_5v0_dcin: regulator-vcc-5v0-dcin {
compatible = "regulator-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-name = "vcc_12v0_dcin";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc_5v0_dcin";
};
vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 {
@ -159,6 +167,19 @@ vcc_3v3_ufs_s0: regulator-vcc-ufs-s0 {
vin-supply = <&vcc_5v0_sys>;
};
vcc_3v3_wifi: regulator-vcc-3v3-wifi {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_wifi_pwr>;
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc_3v3_wifi";
vin-supply = <&vcc_3v3_s3>;
};
vcc_5v0_device: regulator-vcc-5v0-device {
compatible = "regulator-fixed";
regulator-always-on;
@ -166,7 +187,7 @@ vcc_5v0_device: regulator-vcc-5v0-device {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc_5v0_device";
vin-supply = <&vcc_12v0_dcin>;
vin-supply = <&vcc_5v0_sys>;
};
vcc_5v0_host: regulator-vcc-5v0-host {
@ -180,7 +201,21 @@ vcc_5v0_host: regulator-vcc-5v0-host {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc5v0_host";
vin-supply = <&vcc_5v0_device>;
vin-supply = <&vcc_5v0_sys>;
};
vcc_5v0_otg: regulator-vcc-5v0-otg {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_otg_pwren>;
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc5v0_otg";
vin-supply = <&vcc_5v0_sys>;
};
vcc_5v0_sys: regulator-vcc-5v0-sys {
@ -190,7 +225,7 @@ vcc_5v0_sys: regulator-vcc-5v0-sys {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-name = "vcc_5v0_sys";
vin-supply = <&vcc_12v0_dcin>;
vin-supply = <&vcc_5v0_dcin>;
};
};
@ -269,6 +304,10 @@ hdmi_out_con: endpoint {
};
};
&hdmi_sound {
status = "okay";
};
&hdptxphy {
status = "okay";
};
@ -645,14 +684,16 @@ hym8563: rtc@51 {
&mdio0 {
rgmii_phy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
compatible = "ethernet-phy-id001c.c916";
reg = <0x1>;
clocks = <&cru REFCLKO25M_GMAC0_OUT>;
assigned-clocks = <&cru REFCLKO25M_GMAC0_OUT>;
assigned-clock-rates = <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&rtl8211f_rst>;
reset-assert-us = <20000>;
reset-deassert-us = <100000>;
reset-gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
};
};
@ -697,9 +738,26 @@ pcie_reset: pcie-reset {
usb {
usb_host_pwren: usb-host-pwren {
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
};
usb_otg_pwren: usb-otg-pwren {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wifi {
usb_wifi_pwr: usb-wifi-pwr {
rockchip,pins = <2 RK_PC7 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_en_h: wifi-en-h {
rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&sai6 {
status = "okay";
};
&sdmmc {
@ -736,15 +794,38 @@ &u2phy0 {
status = "okay";
};
&u2phy0_otg {
phy-supply = <&vcc_5v0_otg>;
status = "okay";
};
&u2phy1 {
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc_5v0_host>;
status = "okay";
};
&uart0 {
pinctrl-0 = <&uart0m0_xfer>;
status = "okay";
};
&ufshc {
status = "okay";
};
&usbdp_phy {
status = "okay";
};
&usb_drd0_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_drd1_dwc3 {
dr_mode = "host";
status = "okay";

17
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
View File

@ -391,6 +391,17 @@ hdmi1_out_con: endpoint {
};
};
&hdmi_receiver_cma {
status = "okay";
};
&hdmi_receiver {
hpd-gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>;
pinctrl-names = "default";
status = "okay";
};
&hdptxphy0 {
status = "okay";
};
@ -582,6 +593,12 @@ rtl8211f_rst: rtl8211f-rst {
};
hdmirx {
hdmirx_hpd: hdmirx-5v-detection {
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;

2
arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
View File

@ -10,6 +10,7 @@
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include <dt-bindings/usb/pd.h>
#include "rk8xx.h"
#include "rk3588.dtsi"
/ {
@ -693,6 +694,7 @@ pmic@0 {
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc5v0_sys>;
rockchip,reset-mode = <RK806_RESTART>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";

2
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
View File

@ -6,6 +6,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk8xx.h"
#include "rk3588.dtsi"
/ {
@ -440,6 +441,7 @@ pmic@0 {
vcc13-supply = <&vcc_1v1_nldo_s3>;
vcc14-supply = <&vcc_1v1_nldo_s3>;
vcca-supply = <&vcc5v0_sys>;
rockchip,reset-mode = <RK806_RESTART>;
rk806_dvs1_null: dvs1-null-pins {
pins = "gpio_pwrctrl1";

18
arch/arm64/boot/dts/rockchip/rk8xx.h Normal file
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@ -0,0 +1,18 @@
/* SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) */
/*
* Device Tree defines for Rockchip RK8xx PMICs
*
* Copyright 2025 Cherry Embedded Solutions GmbH
*
* Author: Quentin Schulz <quentin.schulz@cherry.de>
*/
#ifndef _DT_MFD_ROCKCHIP_RK8XX_H
#define _DT_MFD_ROCKCHIP_RK8XX_H
/* For use with rockchip,reset-mode property */
#define RK806_RESTART 0
#define RK806_RESET 1
#define RK806_RESET_NOTIFY 2
#endif