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arm64: dts: renesas: r9a07g054: Add max-frequency to SDHI nodes

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Add the max-frequency property set to 133333333 Hz (133.33 MHz) to both
SDHI0 and SDHI1 MMC controller nodes in the RZ/V2L (r9a07g054) device
tree, increasing performance by ca. 33%.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260520115144.60067-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2026-05-20 12:51:41 +01:00 committed by Geert Uytterhoeven
parent 1b3c392bd6
commit dcbbb12660
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/renesas/r9a07g054.dtsi
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@ -1182,6 +1182,7 @@ sdhi0: mmc@11c00000 {
<&cpg CPG_MOD R9A07G054_SDHI0_IMCLK2>,
<&cpg CPG_MOD R9A07G054_SDHI0_ACLK>;
clock-names = "core", "clkh", "cd", "aclk";
max-frequency = <133333333>;
resets = <&cpg R9A07G054_SDHI0_IXRST>;
power-domains = <&cpg>;
status = "disabled";
@ -1198,6 +1199,7 @@ sdhi1: mmc@11c10000 {
<&cpg CPG_MOD R9A07G054_SDHI1_IMCLK2>,
<&cpg CPG_MOD R9A07G054_SDHI1_ACLK>;
clock-names = "core", "clkh", "cd", "aclk";
max-frequency = <133333333>;
resets = <&cpg R9A07G054_SDHI1_IXRST>;
power-domains = <&cpg>;
status = "disabled";