mirror of
https://github.com/torvalds/linux.git
synced 2026-07-28 01:55:51 +02:00
arm64: dts: renesas: r9a07g044: Add max-frequency to SDHI nodes
Add the max-frequency property set to 133333333 Hz (133.33 MHz) to both
SDHI0 and SDHI1 MMC controller nodes in the RZ/{G2L,G2LC} (r9a07g044)
device tree, increasing performance by ca. 33%.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260520115144.60067-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
parent
f82892de7f
commit
1b3c392bd6
|
|
@ -1174,6 +1174,7 @@ sdhi0: mmc@11c00000 {
|
|||
<&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
|
||||
clock-names = "core", "clkh", "cd", "aclk";
|
||||
max-frequency = <133333333>;
|
||||
resets = <&cpg R9A07G044_SDHI0_IXRST>;
|
||||
power-domains = <&cpg>;
|
||||
status = "disabled";
|
||||
|
|
@ -1190,6 +1191,7 @@ sdhi1: mmc@11c10000 {
|
|||
<&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
|
||||
<&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
|
||||
clock-names = "core", "clkh", "cd", "aclk";
|
||||
max-frequency = <133333333>;
|
||||
resets = <&cpg R9A07G044_SDHI1_IXRST>;
|
||||
power-domains = <&cpg>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user