arm64: dts: ti: var-som-am62p: update audio codec configuration

Update the WM8904 audio codec configuration on the VAR-SOM-AM62P.

Set the audio reference clock rate to 12 MHz and add the codec DRC, GPIO
and DMIC configuration required by the board.

Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Link: https://patch.msgid.link/76e49b33e7810b7cf6452cf827d88b5d0f04ba3b.1782680023.git.stefano.r@variscite.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Stefano Radaelli 2026-06-28 22:56:06 +02:00 committed by Vignesh Raghavendra
parent 4b92d84c6c
commit d8c22a5005

View File

@ -152,7 +152,7 @@ simple-audio-card,cpu {
};
&audio_refclk1 {
assigned-clock-rates = <100000000>;
assigned-clock-rates = <12000000>;
};
&cpsw3g {
@ -203,6 +203,23 @@ wm8904: audio-codec@1a {
DBVDD-supply = <&reg_3v3>;
DCVDD-supply = <&reg_1v8>;
MICVDD-supply = <&reg_1v8>;
wlf,drc-cfg-names = "default", "peaklimiter", "tradition",
"soft", "music";
/*
* Config registers per name, respectively:
* KNEE_IP = 0, KNEE_OP = 0, HI_COMP = 1, LO_COMP = 1
* KNEE_IP = -24, KNEE_OP = -6, HI_COMP = 1/4, LO_COMP = 1
* KNEE_IP = -42, KNEE_OP = -3, HI_COMP = 0, LO_COMP = 1
* KNEE_IP = -45, KNEE_OP = -9, HI_COMP = 1/8, LO_COMP = 1
* KNEE_IP = -30, KNEE_OP = -10.5, HI_COMP = 1/4, LO_COMP = 1
*/
wlf,drc-cfg-regs = /bits/ 16 <0x01af 0x3248 0x0000 0x0000>,
/bits/ 16 <0x04af 0x324b 0x0010 0x0408>,
/bits/ 16 <0x04af 0x324b 0x0028 0x0704>,
/bits/ 16 <0x04af 0x324b 0x0018 0x078c>,
/bits/ 16 <0x04af 0x324b 0x0010 0x050e>;
/* GPIO1 = DMIC_CLK, don't touch others */
wlf,gpio-cfg = <0x0018>, <0xffff>, <0xffff>, <0xffff>;
};
};