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arm64: dts: ti: k3-am625-sk: Enable PWM

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PWM signals can be routed to the user expansion header on am625
SK and am62 lp sk. Enable eCAP0, eCAP1, eHRPWM1, and route the
output PWM signals to pins on J3 header.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250422000851.4118545-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Judith Mendez 2025-04-21 19:08:51 -05:00 committed by Nishanth Menon
parent 5aec1169b5
commit d864bb528a
1 changed files with 40 additions and 0 deletions
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40
arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
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@ -303,6 +303,25 @@ AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
>;
};
main_ecap0_pins_default: main-ecap0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C13) SPI0_CS1.ECAP0_IN_APWM_OUT */
>;
};
main_ecap2_pins_default: main-ecap2-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (B20) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */
>;
};
main_epwm1_pins_default: main-epwm1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */
AM62X_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (E18) MCASP0_AXR0.EHRPWM1_B */
>;
};
};
&mcu_pmx0 {
@ -560,3 +579,24 @@ &mcu_gpio0 {
&mcu_gpio_intr {
status = "reserved";
};
&ecap0 {
/* P26 of J3 */
pinctrl-names = "default";
pinctrl-0 = <&main_ecap0_pins_default>;
status = "okay";
};
&ecap2 {
/* P11 of J3 */
pinctrl-names = "default";
pinctrl-0 = <&main_ecap2_pins_default>;
status = "okay";
};
&epwm1 {
/* P36/P33 of J3 */
pinctrl-names = "default";
pinctrl-0 = <&main_epwm1_pins_default>;
status = "okay";
};