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perf annotate-arm64: Support 'mov' instruction tracking
Extend update_insn_state_arm64() to support register-to-register and immediate-to-register 'mov' instructions. For register-to-register 'mov' (e.g., mov dreg, sreg), propagate data type information from the source register to the destination register. For immediate-to-register 'mov' (e.g., mov dreg, #imm), store the immediate value in the destination register's imm_value field and set its kind to TSR_KIND_CONST, allowing subsequent instructions to resolve it as a constant. A real-world example is shown below: ffff8000803eebf8 <get_vma_policy>: ffff8000803eec20: mov x21, x0 // x0 (struct vm_area_struct*) -> x21 ffff8000803eec28: ldr x2, [x0, #112] ffff8000803eec2c: cbz x2, ffff8000803eec94 <get_vma_policy+0x9c> * ffff8000803eec94: ldr x0, [x21, #152] Before this commit, the type of x21 was unknown, causing the subsequent inference to fail: var [0] reg0 offset 0 type='struct vm_area_struct*' size=0x8 chk [9c] reg21 offset=0x98 ok=0 kind=0 cfa : no type information final result: no type information After this commit, the type of x21 is correctly inferred as 'vm_area_struct': var [0] reg0 offset 0 type='struct vm_area_struct*' size=0x8 mov [28] reg0 -> reg21 type='struct vm_area_struct*' size=0x8 chk [9c] reg21 offset=0x98 ok=1 kind=1 (struct vm_area_struct*) : Good! found by insn track: 0x98(reg21) type-offset=0x98 final result: type='struct vm_area_struct' size=0xb0 Reviewed-by: Ian Rogers <irogers@google.com> Reviewed-by: Namhyung Kim <namhyung@kernel.org> Signed-off-by: Tengda Wu <wutengda@huaweicloud.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <linux/compiler.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <stdlib.h>
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#include <string.h>
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#include <linux/ctype.h>
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@ -696,6 +697,7 @@ static int propagate_load_reg_state(struct type_state *state,
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tsr->type = type_die;
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tsr->kind = TSR_KIND_TYPE;
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tsr->offset = 0;
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tsr->imm_value = 0;
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tsr->ok = true;
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pr_debug_dtp("%s [%x] %#x(reg%d) -> reg%d",
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@ -909,6 +911,54 @@ static void update_store_insn_state(struct type_state *state,
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adjust_reg_index_state(state, dloc, dl, dst);
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}
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static void update_mov_insn_state(struct type_state *state,
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struct disasm_line *dl,
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struct annotated_op_loc *src,
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struct annotated_op_loc *dst)
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{
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struct type_state_reg *tsr;
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u32 insn_offset = dl->al.offset;
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int sreg = src->reg1;
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int dreg = dst->reg1;
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if (!has_reg_type(state, dreg))
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return;
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tsr = &state->regs[dreg];
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tsr->copied_from = -1;
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if (src->imm) {
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invalidate_reg_state(tsr);
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tsr->kind = TSR_KIND_CONST;
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tsr->imm_value = (s64)src->offset;
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tsr->offset = 0;
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tsr->ok = true;
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pr_debug_dtp("mov [%x] imm=%#"PRIx64" -> reg%d\n",
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insn_offset, tsr->imm_value, dreg);
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return;
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}
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if (!has_reg_type(state, sreg) || !state->regs[sreg].ok) {
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invalidate_reg_state(tsr);
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return;
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}
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tsr->type = state->regs[sreg].type;
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tsr->kind = state->regs[sreg].kind;
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tsr->imm_value = state->regs[sreg].imm_value;
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tsr->offset = state->regs[sreg].offset;
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tsr->lifetime_active = state->regs[sreg].lifetime_active;
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tsr->lifetime_end = state->regs[sreg].lifetime_end;
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tsr->ok = state->regs[sreg].ok;
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if (tsr->kind == TSR_KIND_TYPE || tsr->kind == TSR_KIND_POINTER)
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tsr->copied_from = sreg;
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pr_debug_dtp("mov [%x] reg%d -> reg%d", insn_offset, sreg, dreg);
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pr_debug_type_name(&tsr->type, tsr->kind);
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}
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static void update_insn_state_arm64(struct type_state *state,
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struct data_loc_info *dloc, Dwarf_Die *cu_die,
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struct disasm_line *dl)
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@ -925,6 +975,9 @@ static void update_insn_state_arm64(struct type_state *state,
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if (ins__is_call(&dl->ins))
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update_call_insn_state(state, dloc, cu_die, dl);
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/* Register to register or imm value to register transfers */
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else if (!strcmp(dl->ins.name, "mov"))
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update_mov_insn_state(state, dl, src, dst);
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/* Memory to register transfers */
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else if (is_standard_load_insn(dl->ins.name))
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update_load_insn_state(state, dloc, dl, src, dst);
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