From cf66ee3a5d4467fe677d92520ef5a9d062517493 Mon Sep 17 00:00:00 2001 From: Tengda Wu Date: Tue, 20 Oct 2026 13:45:07 +0000 Subject: [PATCH] perf annotate-arm64: Support 'mov' instruction tracking Extend update_insn_state_arm64() to support register-to-register and immediate-to-register 'mov' instructions. For register-to-register 'mov' (e.g., mov dreg, sreg), propagate data type information from the source register to the destination register. For immediate-to-register 'mov' (e.g., mov dreg, #imm), store the immediate value in the destination register's imm_value field and set its kind to TSR_KIND_CONST, allowing subsequent instructions to resolve it as a constant. A real-world example is shown below: ffff8000803eebf8 : ffff8000803eec20: mov x21, x0 // x0 (struct vm_area_struct*) -> x21 ffff8000803eec28: ldr x2, [x0, #112] ffff8000803eec2c: cbz x2, ffff8000803eec94 * ffff8000803eec94: ldr x0, [x21, #152] Before this commit, the type of x21 was unknown, causing the subsequent inference to fail: var [0] reg0 offset 0 type='struct vm_area_struct*' size=0x8 chk [9c] reg21 offset=0x98 ok=0 kind=0 cfa : no type information final result: no type information After this commit, the type of x21 is correctly inferred as 'vm_area_struct': var [0] reg0 offset 0 type='struct vm_area_struct*' size=0x8 mov [28] reg0 -> reg21 type='struct vm_area_struct*' size=0x8 chk [9c] reg21 offset=0x98 ok=1 kind=1 (struct vm_area_struct*) : Good! found by insn track: 0x98(reg21) type-offset=0x98 final result: type='struct vm_area_struct' size=0xb0 Reviewed-by: Ian Rogers Reviewed-by: Namhyung Kim Signed-off-by: Tengda Wu Signed-off-by: Arnaldo Carvalho de Melo --- .../perf/util/annotate-arch/annotate-arm64.c | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/tools/perf/util/annotate-arch/annotate-arm64.c b/tools/perf/util/annotate-arch/annotate-arm64.c index e97a0cbe02fc..38a9cb37c952 100644 --- a/tools/perf/util/annotate-arch/annotate-arm64.c +++ b/tools/perf/util/annotate-arch/annotate-arm64.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include #include +#include #include #include #include @@ -696,6 +697,7 @@ static int propagate_load_reg_state(struct type_state *state, tsr->type = type_die; tsr->kind = TSR_KIND_TYPE; tsr->offset = 0; + tsr->imm_value = 0; tsr->ok = true; pr_debug_dtp("%s [%x] %#x(reg%d) -> reg%d", @@ -909,6 +911,54 @@ static void update_store_insn_state(struct type_state *state, adjust_reg_index_state(state, dloc, dl, dst); } +static void update_mov_insn_state(struct type_state *state, + struct disasm_line *dl, + struct annotated_op_loc *src, + struct annotated_op_loc *dst) +{ + struct type_state_reg *tsr; + u32 insn_offset = dl->al.offset; + int sreg = src->reg1; + int dreg = dst->reg1; + + if (!has_reg_type(state, dreg)) + return; + + tsr = &state->regs[dreg]; + tsr->copied_from = -1; + + if (src->imm) { + invalidate_reg_state(tsr); + tsr->kind = TSR_KIND_CONST; + tsr->imm_value = (s64)src->offset; + tsr->offset = 0; + tsr->ok = true; + + pr_debug_dtp("mov [%x] imm=%#"PRIx64" -> reg%d\n", + insn_offset, tsr->imm_value, dreg); + return; + } + + if (!has_reg_type(state, sreg) || !state->regs[sreg].ok) { + invalidate_reg_state(tsr); + return; + } + + tsr->type = state->regs[sreg].type; + tsr->kind = state->regs[sreg].kind; + tsr->imm_value = state->regs[sreg].imm_value; + tsr->offset = state->regs[sreg].offset; + tsr->lifetime_active = state->regs[sreg].lifetime_active; + tsr->lifetime_end = state->regs[sreg].lifetime_end; + tsr->ok = state->regs[sreg].ok; + + if (tsr->kind == TSR_KIND_TYPE || tsr->kind == TSR_KIND_POINTER) + tsr->copied_from = sreg; + + pr_debug_dtp("mov [%x] reg%d -> reg%d", insn_offset, sreg, dreg); + pr_debug_type_name(&tsr->type, tsr->kind); +} + static void update_insn_state_arm64(struct type_state *state, struct data_loc_info *dloc, Dwarf_Die *cu_die, struct disasm_line *dl) @@ -925,6 +975,9 @@ static void update_insn_state_arm64(struct type_state *state, if (ins__is_call(&dl->ins)) update_call_insn_state(state, dloc, cu_die, dl); + /* Register to register or imm value to register transfers */ + else if (!strcmp(dl->ins.name, "mov")) + update_mov_insn_state(state, dl, src, dst); /* Memory to register transfers */ else if (is_standard_load_insn(dl->ins.name)) update_load_insn_state(state, dloc, dl, src, dst);