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drm/amdgpu: Add support for update_table for SMU15

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Add update_table for SMU 15_0_0

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Pratik Vishwakarma 2026-01-08 09:01:02 +00:00 committed by Alex Deucher
parent 5cc934e089
commit ce1598f018
2 changed files with 63 additions and 0 deletions
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5
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v15_0.h
View File

@ -241,5 +241,10 @@ int smu_v15_0_enable_thermal_alert(struct smu_context *smu);
int smu_v15_0_disable_thermal_alert(struct smu_context *smu);
int smu_v15_0_0_update_table(struct smu_context *smu,
enum smu_table_id table_index,
int argument, void *table_data,
bool drv2smu);
#endif
#endif

58
drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0.c
View File

@ -1726,6 +1726,64 @@ int smu_v15_0_set_gfx_power_up_by_imu(struct smu_context *smu)
return ret;
}
int smu_v15_0_0_update_table(struct smu_context *smu,
enum smu_table_id table_index,
int argument,
void *table_data,
bool drv2smu)
{
struct smu_table_context *smu_table = &smu->smu_table;
struct amdgpu_device *adev = smu->adev;
struct smu_table *table = &smu_table->driver_table;
int table_id = smu_cmn_to_asic_specific_index(smu,
CMN2ASIC_MAPPING_TABLE,
table_index);
uint64_t address;
uint32_t table_size;
int ret;
struct smu_msg_ctl *ctl = &smu->msg_ctl;
if (!table_data || table_index >= SMU_TABLE_COUNT || table_id < 0)
return -EINVAL;
table_size = smu_table->tables[table_index].size;
if (drv2smu) {
memcpy(table->cpu_addr, table_data, table_size);
/*
* Flush hdp cache: to guard the content seen by
* GPU is consitent with CPU.
*/
amdgpu_hdp_flush(adev, NULL);
}
address = table->mc_address;
struct smu_msg_args args = {
.msg = drv2smu ?
SMU_MSG_TransferTableDram2Smu :
SMU_MSG_TransferTableSmu2Dram,
.num_args = 3,
.num_out_args = 0,
};
args.args[0] = table_id;
args.args[1] = (uint32_t)lower_32_bits(address);
args.args[2] = (uint32_t)upper_32_bits(address);
ret = ctl->ops->send_msg(ctl, &args);
if (ret)
return ret;
if (!drv2smu) {
amdgpu_hdp_invalidate(adev, NULL);
memcpy(table_data, table->cpu_addr, table_size);
}
return 0;
}
int smu_v15_0_set_default_dpm_tables(struct smu_context *smu)
{
struct smu_table_context *smu_table = &smu->smu_table;