github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-11-07 06:17:02 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

clk: qcom: ipq9650: Use icc-clk for enabling NoC related clocks

Browse Source 
Register NoC clocks for PCIe and USB interconnect paths using the
icc-clk framework. Without this, the clocks required to create
interconnect paths and access peripherals connected to these NoCs are
not properly managed.

Also add icc_sync_state to ensure clock states are synchronized after all
consumers have probed.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Link: https://patch.msgid.link/20260811-ipq9650_icc-v2-2-55b8efbd62c6@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Kathiravan Thirumoorthy 2026-08-11 21:23:09 +05:30 committed by Bjorn Andersson
parent eaeb4cea2c
commit c91ba2e1b7
1 changed files with 22 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/clk/qcom/gcc-ipq9650.c
View File

@ -4,11 +4,13 @@
*/
#include <linux/clk-provider.h>
#include <linux/interconnect-provider.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <dt-bindings/clock/qcom,ipq9650-gcc.h>
#include <dt-bindings/interconnect/qcom,ipq9650.h>
#include <dt-bindings/reset/qcom,ipq9650-gcc.h>
#include "clk-alpha-pll.h"
@ -3474,6 +3476,22 @@ static const struct qcom_reset_map gcc_ipq9650_resets[] = {
[GCC_USB_BCR] = { 0x2c000 },
};
#define IPQ_APPS_ID 9650 /* some unique value */
static const struct qcom_icc_hws_data icc_ipq9650_hws[] = {
{ MASTER_ANOC_PCIE0, SLAVE_ANOC_PCIE0, GCC_ANOC_PCIE0_1LANE_M_CLK },
{ MASTER_CNOC_PCIE0, SLAVE_CNOC_PCIE0, GCC_ANOC_PCIE0_1LANE_S_CLK },
{ MASTER_ANOC_PCIE1, SLAVE_ANOC_PCIE1, GCC_ANOC_PCIE1_2LANE_M_CLK },
{ MASTER_CNOC_PCIE1, SLAVE_CNOC_PCIE1, GCC_ANOC_PCIE1_2LANE_S_CLK },
{ MASTER_ANOC_PCIE2, SLAVE_ANOC_PCIE2, GCC_ANOC_PCIE2_2LANE_M_CLK },
{ MASTER_CNOC_PCIE2, SLAVE_CNOC_PCIE2, GCC_ANOC_PCIE2_2LANE_S_CLK },
{ MASTER_ANOC_PCIE3, SLAVE_ANOC_PCIE3, GCC_ANOC_PCIE3_2LANE_M_CLK },
{ MASTER_CNOC_PCIE3, SLAVE_CNOC_PCIE3, GCC_ANOC_PCIE3_2LANE_S_CLK },
{ MASTER_ANOC_PCIE4, SLAVE_ANOC_PCIE4, GCC_ANOC_PCIE4_1LANE_M_CLK },
{ MASTER_CNOC_PCIE4, SLAVE_CNOC_PCIE4, GCC_ANOC_PCIE4_1LANE_S_CLK },
{ MASTER_SNOC_USB, SLAVE_SNOC_USB, GCC_SNOC_USB_CLK },
};
static const struct of_device_id gcc_ipq9650_match_table[] = {
{ .compatible = "qcom,ipq9650-gcc" },
{ }
@ -3503,6 +3521,9 @@ static const struct qcom_cc_desc gcc_ipq9650_desc = {
.num_resets = ARRAY_SIZE(gcc_ipq9650_resets),
.clk_hws = gcc_ipq9650_hws,
.num_clk_hws = ARRAY_SIZE(gcc_ipq9650_hws),
.icc_hws = icc_ipq9650_hws,
.num_icc_hws = ARRAY_SIZE(icc_ipq9650_hws),
.icc_first_node_id = IPQ_APPS_ID,
};
static int gcc_ipq9650_probe(struct platform_device *pdev)
@ -3515,6 +3536,7 @@ static struct platform_driver gcc_ipq9650_driver = {
.driver = {
.name = "qcom,gcc-ipq9650",
.of_match_table = gcc_ipq9650_match_table,
.sync_state = icc_sync_state,
},
};