diff --git a/drivers/clk/qcom/gcc-ipq9650.c b/drivers/clk/qcom/gcc-ipq9650.c index e65a52fdfa91..8c09a757c11d 100644 --- a/drivers/clk/qcom/gcc-ipq9650.c +++ b/drivers/clk/qcom/gcc-ipq9650.c @@ -4,11 +4,13 @@ */ #include +#include #include #include #include #include +#include #include #include "clk-alpha-pll.h" @@ -3474,6 +3476,22 @@ static const struct qcom_reset_map gcc_ipq9650_resets[] = { [GCC_USB_BCR] = { 0x2c000 }, }; +#define IPQ_APPS_ID 9650 /* some unique value */ + +static const struct qcom_icc_hws_data icc_ipq9650_hws[] = { + { MASTER_ANOC_PCIE0, SLAVE_ANOC_PCIE0, GCC_ANOC_PCIE0_1LANE_M_CLK }, + { MASTER_CNOC_PCIE0, SLAVE_CNOC_PCIE0, GCC_ANOC_PCIE0_1LANE_S_CLK }, + { MASTER_ANOC_PCIE1, SLAVE_ANOC_PCIE1, GCC_ANOC_PCIE1_2LANE_M_CLK }, + { MASTER_CNOC_PCIE1, SLAVE_CNOC_PCIE1, GCC_ANOC_PCIE1_2LANE_S_CLK }, + { MASTER_ANOC_PCIE2, SLAVE_ANOC_PCIE2, GCC_ANOC_PCIE2_2LANE_M_CLK }, + { MASTER_CNOC_PCIE2, SLAVE_CNOC_PCIE2, GCC_ANOC_PCIE2_2LANE_S_CLK }, + { MASTER_ANOC_PCIE3, SLAVE_ANOC_PCIE3, GCC_ANOC_PCIE3_2LANE_M_CLK }, + { MASTER_CNOC_PCIE3, SLAVE_CNOC_PCIE3, GCC_ANOC_PCIE3_2LANE_S_CLK }, + { MASTER_ANOC_PCIE4, SLAVE_ANOC_PCIE4, GCC_ANOC_PCIE4_1LANE_M_CLK }, + { MASTER_CNOC_PCIE4, SLAVE_CNOC_PCIE4, GCC_ANOC_PCIE4_1LANE_S_CLK }, + { MASTER_SNOC_USB, SLAVE_SNOC_USB, GCC_SNOC_USB_CLK }, +}; + static const struct of_device_id gcc_ipq9650_match_table[] = { { .compatible = "qcom,ipq9650-gcc" }, { } @@ -3503,6 +3521,9 @@ static const struct qcom_cc_desc gcc_ipq9650_desc = { .num_resets = ARRAY_SIZE(gcc_ipq9650_resets), .clk_hws = gcc_ipq9650_hws, .num_clk_hws = ARRAY_SIZE(gcc_ipq9650_hws), + .icc_hws = icc_ipq9650_hws, + .num_icc_hws = ARRAY_SIZE(icc_ipq9650_hws), + .icc_first_node_id = IPQ_APPS_ID, }; static int gcc_ipq9650_probe(struct platform_device *pdev) @@ -3515,6 +3536,7 @@ static struct platform_driver gcc_ipq9650_driver = { .driver = { .name = "qcom,gcc-ipq9650", .of_match_table = gcc_ipq9650_match_table, + .sync_state = icc_sync_state, }, };