mirror of
https://github.com/torvalds/linux.git
synced 2026-10-11 21:07:03 +02:00
arm64: dts: imx8: Correct indentation and whitespace
Correct spaces or mix of tabs+spaces into proper tab-indented lines and remove other whitespace violations. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Krzysztof Kozlowski
Frank Li
parent
43c17d8629
commit
c8cb123cde
|
|
@ -423,7 +423,7 @@ usb-hub@8 {
|
|||
refclk-frequency = <25000000>;
|
||||
reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
|
||||
/* On Module Audio Codec */
|
||||
sgtl5000: audio-codec@a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
|
|
|
|||
|
|
@ -35,9 +35,9 @@ leds {
|
|||
pinctrl-0 = <&pinctrl_gpio_led>;
|
||||
|
||||
led-1 {
|
||||
label = "buzzer";
|
||||
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
label = "buzzer";
|
||||
gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -49,11 +49,11 @@ osc_can: clock-osc-can {
|
|||
};
|
||||
|
||||
reg_audio: regulator-audio {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wm8904_supply";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "wm8904_supply";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
reg_wifi_vmmc: regulator-wifi-vmmc {
|
||||
|
|
@ -68,13 +68,13 @@ reg_wifi_vmmc: regulator-wifi-vmmc {
|
|||
};
|
||||
|
||||
sound-wm8904 {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,bitclock-master = <&dailink_master>;
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,frame-master = <&dailink_master>;
|
||||
simple-audio-card,name = "wm8904-audio";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,routing =
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,bitclock-master = <&dailink_master>;
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,frame-master = <&dailink_master>;
|
||||
simple-audio-card,name = "wm8904-audio";
|
||||
simple-audio-card,mclk-fs = <256>;
|
||||
simple-audio-card,routing =
|
||||
"Headphone Jack", "HPOUTL",
|
||||
"Headphone Jack", "HPOUTR",
|
||||
"IN2L", "Line In Jack",
|
||||
|
|
@ -82,45 +82,44 @@ sound-wm8904 {
|
|||
"Headphone Jack", "MICBIAS",
|
||||
"IN1L", "Headphone Jack";
|
||||
|
||||
simple-audio-card,widgets =
|
||||
"Microphone","Headphone Jack",
|
||||
"Headphone", "Headphone Jack",
|
||||
"Line", "Line In Jack";
|
||||
simple-audio-card,widgets = "Microphone","Headphone Jack",
|
||||
"Headphone", "Headphone Jack",
|
||||
"Line", "Line In Jack";
|
||||
|
||||
dailink_master: simple-audio-card,codec {
|
||||
sound-dai = <&wm8904>;
|
||||
};
|
||||
dailink_master: simple-audio-card,codec {
|
||||
sound-dai = <&wm8904>;
|
||||
};
|
||||
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&sai3>;
|
||||
};
|
||||
simple-audio-card,cpu {
|
||||
sound-dai = <&sai3>;
|
||||
};
|
||||
};
|
||||
|
||||
sound-spdif {
|
||||
compatible = "fsl,imx-audio-spdif";
|
||||
model = "imx-spdif";
|
||||
spdif-controller = <&spdif1>;
|
||||
spdif-out;
|
||||
spdif-in;
|
||||
compatible = "fsl,imx-audio-spdif";
|
||||
model = "imx-spdif";
|
||||
spdif-controller = <&spdif1>;
|
||||
spdif-out;
|
||||
spdif-in;
|
||||
};
|
||||
};
|
||||
|
||||
/* CAN BUS */
|
||||
&ecspi2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi2>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi2>;
|
||||
status = "okay";
|
||||
|
||||
can: can@0 {
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_canbus>;
|
||||
clocks = <&osc_can>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
can: can@0 {
|
||||
compatible = "microchip,mcp2515";
|
||||
reg = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_canbus>;
|
||||
clocks = <&osc_can>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&fec1 {
|
||||
|
|
@ -177,29 +176,29 @@ rtc@32 {
|
|||
|
||||
/* AUDIO */
|
||||
&sai3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
|
||||
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sai3>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
|
||||
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spdif1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spdif1>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>;
|
||||
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
|
||||
<&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>;
|
||||
clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",
|
||||
"rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spdif1>;
|
||||
assigned-clocks = <&clk IMX8MM_CLK_SPDIF1>;
|
||||
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
|
||||
assigned-clock-rates = <24576000>;
|
||||
clocks = <&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_24M>,
|
||||
<&clk IMX8MM_CLK_SPDIF1>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_CLK_AUDIO_AHB>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>,
|
||||
<&clk IMX8MM_AUDIO_PLL1_OUT>, <&clk IMX8MM_AUDIO_PLL2_OUT>;
|
||||
clock-names = "core", "rxtx0", "rxtx1", "rxtx2", "rxtx3",
|
||||
"rxtx4", "rxtx5", "rxtx6", "rxtx7", "spba", "pll8k", "pll11k";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* USBOTG */
|
||||
|
|
@ -216,8 +215,8 @@ usb_hs_ep: endpoint {
|
|||
};
|
||||
|
||||
&usbotg2 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Wifi */
|
||||
|
|
@ -246,26 +245,26 @@ wifi: wifi@1 {
|
|||
|
||||
/* SD-card */
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
|
||||
pinctrl_canbus: canbusgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x14
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x14
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi2: ecspi2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x82
|
||||
MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x82
|
||||
MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
|
||||
MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
|
||||
MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
|
||||
|
|
@ -274,125 +273,125 @@ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
|
|||
|
||||
pinctrl_usb_otg: usbotggrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x140 /* otg_id */
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 /* otg_vbus */
|
||||
MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x140 /* otg_id */
|
||||
MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19 /* otg_vbus */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec1: fec1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
|
||||
MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
|
||||
MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
|
||||
MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
|
||||
MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
|
||||
MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
|
||||
MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
|
||||
MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
|
||||
MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
|
||||
MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
|
||||
MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
|
||||
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_sai3: sai3grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
|
||||
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
|
||||
>;
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
|
||||
MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
|
||||
MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_spdif1: spdif1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
|
||||
>;
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0xd6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x194
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
|
||||
MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x196
|
||||
MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1_gpio: usdhc1-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 /* wl_reg_on */
|
||||
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x41 /* wl_host_wake */
|
||||
MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141 /* LP0: 32KHz */
|
||||
MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x41 /* wl_reg_on */
|
||||
MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x41 /* wl_host_wake */
|
||||
MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x141 /* LP0: 32KHz */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
fsl,pins = <
|
||||
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
||||
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
||||
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -7,9 +7,9 @@
|
|||
/plugin/;
|
||||
|
||||
&flexcan2 {
|
||||
status = "okay"; /* can2 pin conflict with pdm */
|
||||
status = "okay"; /* can2 pin conflict with pdm */
|
||||
};
|
||||
|
||||
&micfil {
|
||||
status = "disabled";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -32,29 +32,29 @@ led-0 {
|
|||
};
|
||||
|
||||
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VSD_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "VSD_3V3";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
};
|
||||
|
||||
&A53_0 {
|
||||
cpu-supply = <&buck2>;
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_1 {
|
||||
cpu-supply = <&buck2>;
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_2 {
|
||||
cpu-supply = <&buck2>;
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&A53_3 {
|
||||
cpu-supply = <&buck2>;
|
||||
cpu-supply = <&buck2>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
@ -220,7 +220,7 @@ &wdog1 {
|
|||
&iomuxc {
|
||||
pinctrl_gpio_led: gpioledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x19
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x19
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -233,15 +233,15 @@ MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
|
|||
|
||||
pinctrl_i2c6: i2c6grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA 0x400001c3
|
||||
MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL 0x400001c3
|
||||
MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA 0x400001c3
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_mcp23018: mcp23018grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x1c0
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x100
|
||||
MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x1c0
|
||||
MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x100
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -253,15 +253,15 @@ MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x1c0
|
|||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc1: usdhc1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x10
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x150
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x10
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x150
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x150
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x150
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x150
|
||||
|
|
@ -277,8 +277,8 @@ MX8MP_IOMUXC_SD1_RESET_B__USDHC1_RESET_B 0x140
|
|||
|
||||
pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x14
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x154
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x14
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x154
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x154
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x154
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x154
|
||||
|
|
@ -293,8 +293,8 @@ MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE 0x14
|
|||
|
||||
pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x12
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x152
|
||||
MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x12
|
||||
MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x152
|
||||
MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x152
|
||||
MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x152
|
||||
MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x152
|
||||
|
|
@ -309,34 +309,34 @@ MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE 0x12
|
|||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -215,7 +215,7 @@ vibrator {
|
|||
compatible = "gpio-vibrator";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_haptic>;
|
||||
enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
|
||||
enable-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
|
||||
vcc-supply = <®_3v3_p>;
|
||||
};
|
||||
|
||||
|
|
@ -856,7 +856,7 @@ MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
|
|||
|
||||
pinctrl_wifi_pwr_en: wifipwrengrp {
|
||||
fsl,pins = <
|
||||
MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x06
|
||||
MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5 0x06
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user