arm64: dts: freescale: imx9-var-dart-sonata: fix Ethernet PHY configuration

Fix the Ethernet PHY description on the DART-MX9 Sonata boards.

The GPIO previously described as the PHY reset line is actually a
board-level enable signal required by the PHY. Model it accordingly and
remove the incorrect reset GPIO description from the PHY nodes.

On i.MX91 and i.MX93 the signal is described as a fixed regulator,
whereas the existing regulator description on i.MX95 is reused.

Keeping the PHY enable asserted during boot ensures that Ethernet
initialization completes successfully.

Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Stefano Radaelli 2026-07-03 17:27:31 +02:00 committed by Frank Li
parent b9fff21cbd
commit 43c17d8629
3 changed files with 22 additions and 9 deletions

View File

@ -97,6 +97,17 @@ reg_rgb_sel: regulator-rgb-enable {
enable-active-high;
};
reg_phy1_supply: regulator-phy1 {
compatible = "regulator-fixed";
regulator-name = "SUPPLY_PHY1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca6408_2 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <10000>;
regulator-always-on;
};
reg_usdhc2_vmmc: regulator-vmmc-usdhc2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@ -139,9 +150,6 @@ mdio {
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>;
reset-assert-us = <15000>;
reset-deassert-us = <100000>;
leds {
#address-cells = <1>;

View File

@ -103,6 +103,17 @@ reg_vref_1v8: regulator-adc-vref {
regulator-min-microvolt = <1800000>;
};
reg_phy1_supply: regulator-phy1 {
compatible = "regulator-fixed";
regulator-name = "SUPPLY_PHY1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pca6408_2 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <10000>;
regulator-always-on;
};
reg_usdhc2_vmmc: regulator-vmmc-usdhc2 {
compatible = "regulator-fixed";
regulator-name = "VDD_SD2_3V3";
@ -180,9 +191,6 @@ mdio {
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-assert-us = <15000>;
reset-deassert-us = <100000>;
reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>;
leds {
#address-cells = <1>;

View File

@ -346,9 +346,6 @@ &netc_emdio {
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <100000>;
leds {
#address-cells = <1>;