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arm64: dts: rockchip: Switch microSD card detect to gpio on Radxa ROCK 5 ITX/5C

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Due to the discussion about cd-gpios and sdmmmc_det pin functionality [1],
it would be better to use cd-gpios for now.

When the sdmmc controller runtime-suspends, the detection logic inside the
controller cannot detect anything anymore, which using the gpio variant
fixes.

The Rock 5B/5B+/5T already uses cd-gpios, so only get the pinctrl added.

[1] https://lore.kernel.org/linux-rockchip/20240912152538.1.I858c2a0bf83606c8b59ba1ab6944978a398d2ac5@changeid/

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
[amended commit description a bit and squashed the pinctrl patch]
Link: https://patch.msgid.link/20251111071730.126238-2-naoki@radxa.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
FUKAUMI Naoki 2025-11-11 07:17:28 +00:00 committed by Heiko Stuebner
parent 156a530ed5
commit c7a9549ce4
4 changed files with 33 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
View File

@ -670,6 +670,12 @@ led_pins: led-pins {
};
};
mmc {
sdmmc_det_pin: sdmmc-det-pin {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie20x1_2_perstn: pcie20x1-2-perstn {
rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
@ -795,12 +801,13 @@ &sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
max-frequency = <200000000>;
no-sdio;
no-mmc;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;

8
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-5bp-5t.dtsi
View File

@ -509,6 +509,12 @@ hym8563_int: hym8563-int {
};
};
mmc {
sdmmc_det_pin: sdmmc-det-pin {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie2 {
pcie2_0_rst: pcie2-0-rst {
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
@ -598,6 +604,8 @@ &sdmmc {
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;

8
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
View File

@ -377,6 +377,12 @@ io_led: io-led {
};
};
mmc {
sdmmc_det_pin: sdmmc-det-pin {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pow_en: pow-en {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
@ -436,6 +442,8 @@ &sdmmc {
max-frequency = <150000000>;
no-sdio;
no-mmc;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s0>;
vqmmc-supply = <&vccio_sd_s0>;

9
arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts
View File

@ -473,6 +473,12 @@ gmac1_rstn: gmac1-rstn {
};
};
mmc {
sdmmc_det_pin: sdmmc-det-pin {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie20x1_2_perstn_m0: pcie20x1-2-perstn-m0 {
rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
@ -533,9 +539,12 @@ &sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
no-sdio;
no-mmc;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det_pin>;
sd-uhs-sdr104;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;