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ARM: dts: stm32: phyboard-sargas and phycore: Fix coding style issues
- Remove "stm32-pinfunc.h" include as it is already include in
"stm32mp15-pinctrl.dtsi" file.
- reserved-memory: reorder the memory sections (lower to higher
addresses).
- Move vendor properties (go last).
- Remove useless compatible values:
- QSPI flash: remove the winbond compatible. jedec is enought as the
NOR flahses are detectable.
- EEPROM: "atmel,24c32" is enought.
- Use uppercase for regulator-name properties.
- In pmic node: use the names from the PHYTEC SoM schematics.
- stmpe811 touch: fix dts schema to comply with st,stmpe.yaml.
- Fix one "multiple blank lines" detected by checkpatch.
Signed-off-by: Christophe Parant <c.parant@phytec.fr>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
This commit is contained in:
parent
e4c9cc7388
commit
c586a77263
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@ -6,7 +6,6 @@
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/dts-v1/;
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#include <dt-bindings/pinctrl/stm32-pinfunc.h>
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#include "stm32mp157.dtsi"
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#include "stm32mp15xc.dtsi"
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#include "stm32mp15xx-phycore-som.dtsi"
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@ -5,7 +5,6 @@
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* Author: Dom VOVARD <dom.vovard@linrt.com>.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/leds/common.h>
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@ -159,10 +158,10 @@ &sai2 {
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&sai2a {
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dma-names = "rx";
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st,sync = <&sai2b 2>;
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clocks = <&rcc SAI2_K>, <&sai2b>;
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clock-names = "sai_ck", "MCLK";
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#clock-cells = <0>;
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st,sync = <&sai2b 2>;
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sai2a_port: port {
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sai2a_endpoint: endpoint {
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@ -195,9 +194,9 @@ &sdmmc1 {
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pinctrl-2 = <&sdmmc1_b4_sleep_pins_b>;
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cd-gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
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disable-wp;
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st,neg-edge;
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bus-width = <4>;
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vmmc-supply = <&v3v3>;
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st,neg-edge;
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status = "okay";
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};
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@ -36,18 +36,6 @@ reserved-memory {
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#size-cells = <1>;
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ranges;
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retram: retram@38000000 {
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compatible = "shared-dma-pool";
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reg = <0x38000000 0x10000>;
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no-map;
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};
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mcuram: mcuram@30000000 {
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compatible = "shared-dma-pool";
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reg = <0x30000000 0x40000>;
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no-map;
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};
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mcuram2: mcuram2@10000000 {
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compatible = "shared-dma-pool";
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reg = <0x10000000 0x40000>;
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@ -71,11 +59,23 @@ vdev0buffer: vdev0buffer@10042000 {
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reg = <0x10042000 0x4000>;
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no-map;
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};
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mcuram: mcuram@30000000 {
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compatible = "shared-dma-pool";
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reg = <0x30000000 0x40000>;
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no-map;
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};
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retram: retram@38000000 {
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compatible = "shared-dma-pool";
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reg = <0x38000000 0x10000>;
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no-map;
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};
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};
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regulator_vin: regulator {
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compatible = "regulator-fixed";
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regulator-name = "vin";
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regulator-name = "VIN";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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@ -102,11 +102,11 @@ phy0: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&gpiog>;
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interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
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enet-phy-lane-no-swap;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,min-output-impedance;
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enet-phy-lane-no-swap;
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ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
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};
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};
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@ -144,7 +144,7 @@ regulators {
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pwr_sw2-supply = <&bst_out>;
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vddcore: buck1 {
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regulator-name = "vddcore";
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regulator-name = "VDD_CORE";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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@ -152,7 +152,7 @@ vddcore: buck1 {
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};
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vdd_ddr: buck2 {
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regulator-name = "vdd_ddr";
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regulator-name = "VDD_DDR";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-always-on;
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@ -160,7 +160,7 @@ vdd_ddr: buck2 {
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};
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vdd: buck3 {
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regulator-name = "vdd";
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regulator-name = "VDD";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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@ -169,7 +169,7 @@ vdd: buck3 {
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};
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v3v3: buck4 {
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regulator-name = "v3v3";
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regulator-name = "VDD_BUCK4";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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@ -177,7 +177,7 @@ v3v3: buck4 {
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};
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v1v8_audio: ldo1 {
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regulator-name = "v1v8_audio";
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regulator-name = "VDD_LDO1";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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@ -186,7 +186,7 @@ v1v8_audio: ldo1 {
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};
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vdd_eth_2v5: ldo2 {
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regulator-name = "dd_eth_2v5";
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regulator-name = "VDD_ETH_2V5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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@ -195,7 +195,7 @@ vdd_eth_2v5: ldo2 {
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};
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vtt_ddr: ldo3 {
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regulator-name = "vtt_ddr";
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regulator-name = "VTT_DDR";
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regulator-min-microvolt = <500000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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@ -203,12 +203,12 @@ vtt_ddr: ldo3 {
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};
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vdd_usb: ldo4 {
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regulator-name = "vdd_usb";
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regulator-name = "VDD_USB";
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interrupts = <IT_CURLIM_LDO4 0>;
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};
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vdda: ldo5 {
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regulator-name = "vdda";
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regulator-name = "VDDA";
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regulator-min-microvolt = <2900000>;
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regulator-max-microvolt = <2900000>;
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interrupts = <IT_CURLIM_LDO5 0>;
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@ -216,7 +216,7 @@ vdda: ldo5 {
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};
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vdd_eth_1v0: ldo6 {
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regulator-name = "vdd_eth_1v0";
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regulator-name = "VDD_ETH_1V0";
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-always-on;
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@ -225,23 +225,23 @@ vdd_eth_1v0: ldo6 {
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};
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vref_ddr: vref_ddr {
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regulator-name = "vref_ddr";
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regulator-name = "VDD_REFDDR";
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regulator-always-on;
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};
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bst_out: boost {
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regulator-name = "bst_out";
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regulator-name = "BST_OUT";
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interrupts = <IT_OCP_BOOST 0>;
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};
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vbus_otg: pwr_sw1 {
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regulator-name = "vbus_otg";
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regulator-name = "VBUS_OTG";
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interrupts = <IT_OCP_OTG 0>;
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regulator-active-discharge = <1>;
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};
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vbus_sw: pwr_sw2 {
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regulator-name = "vbus_sw";
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regulator-name = "VBUS_SW";
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interrupts = <IT_OCP_SWOUT 0>;
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regulator-active-discharge = <1>;
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};
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@ -262,8 +262,7 @@ watchdog {
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};
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i2c4_eeprom: eeprom@50 {
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compatible = "microchip,24c32",
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"atmel,24c32";
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compatible = "atmel,24c32";
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reg = <0x50>;
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status = "disabled";
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};
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@ -312,13 +311,11 @@ &qspi_bk1_sleep_pins_a
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status = "disabled";
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flash0: flash@0 {
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compatible = "winbond,w25q128", "jedec,spi-nor";
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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@ -342,10 +339,10 @@ &sdmmc2 {
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non-removable;
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no-sd;
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no-sdio;
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st,neg-edge;
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bus-width = <8>;
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vmmc-supply = <&v3v3>;
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vqmmc-supply = <&v3v3>;
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mmc-ddr-3_3v;
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st,neg-edge;
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status = "disabled";
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};
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