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More attention for the rk3128 soc (dsi, i2c, spdif, sfc), hdmi-sound
for a rk3066a board and some minor cleanups. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmZ938wQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgcqdB/sG3WZ6hIWShGF20oDTREtJlxkOGenvGZDO d3DjFoq7s2zmsucDy95zsHB0Y3xd6yfZnKBqVs0UlYoegCA/Q+67Itj4o7g7nCn+ SdgsTrc4B+EbS1OuHjeKGQbyDkk/vZ3Bhb37RBYMsfN0v5kErMdb5fh72ApXY3I3 vMDlEMdSE4vYxChy3X+arW29EDQvExfk+aNRogksQdDDo4JbJYBrKXU5YiIJV7LN 64jvzAyC83sy3wajmLf6p67wVaFAfWbKdh2oHP7s+Ra4dzsfnIDT30EDaMtic7gx YOpXxk+GJywGabYtHdUPDN5O39BQsebVkrCh3RjFVlDxXG1DVwkK =uH5O -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+3BsACgkQYKtH/8kJ UieZahAAy8/8lVgeJPNAhSXD5j6Ov+gLaJBRYaVJJ29LV7PVYvlwxVzgZS8GAY9g F5KJ0EN7TewhUCm++6sZ+u1vm6chf8tk7ijOVjeiMJL25ECAvz1RnSg/qGMYTC24 ZI47IQYF+oOrV8cA3HT+5UnbsT/Jejbf4gTrLXKjvqOXjc1pXI95X74WMsnr5hH1 EM5kLVhqiMJPuDHknQavkywf4HgByMdUf6UJKboUAymHzICgwxZOcUva/QIJWZui /Wx+GrVwGPrtGgtUwsraKg3bY/eFvNso0UWGU7LWOaSk/rytTPzU7sVwInaT3qaY 6imlD27FMjmoKv5hBWK++ZN6IXMd+qCrRl1ZXTFHXN8z/ppfFnWwuhm1dqYC6dDP ypmGxC+KkEF+m8Y098XA+h1Ksdtad7XHrJuha5cvgD6ogGzfIX4/OWWpT5ia4DL2 WkMPvx0U7cUWhSwX9jRRlmLTl8ulIMmAFtPapnR/QjVlZxoRSMYs18J/m9/RXMIa N5DrHdfSl3cCX7cN4652m+F39KOnGloG0CqVe6KFkRf1eweCSKrT6W0+IZywHqVx 2Ko/2I8PoatbzLgq+b9+e+3DNWLbzGdYp6XPKOurz7rI8e6DWoU68aXIAc17rlPH 1G11r3K7UX9dNPWnZKcsbPSSwSmhoUbJt7iQ1bOMSnyJ64aUxRM= =ZCNf -----END PGP SIGNATURE----- Merge tag 'v6.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt More attention for the rk3128 soc (dsi, i2c, spdif, sfc), hdmi-sound for a rk3066a board and some minor cleanups. * tag 'v6.11-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: add #sound-dai-cells to hdmi node on rk3128 ARM: dts: rockchip: add #sound-dai-cells to hdmi node no rk3036 ARM: dts: rockchip: enable hdmi_sound and i2s0 for mk808 hdmi ARM: dts: rockchip: Add SFC for RK3128 ARM: dts: rockchip: add hdmi-sound node to rk3066a ARM: dts: rockchip: Add spdif node for RK3128 ARM: dts: rockchip: Add i2s nodes for RK3128 ARM: dts: rockchip: Add DSI for RK3128 ARM: dts: rockchip: Add D-PHY for RK3128 dt-bindings: clock: rk3128: Add PCLK_MIPIPHY Link: https://lore.kernel.org/r/2187283.irdbgypaU6@diego Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
c5003718cb
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@ -402,6 +402,7 @@ hdmi: hdmi@20034000 {
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rockchip,grf = <&grf>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_ctl>;
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#sound-dai-cells = <0>;
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status = "disabled";
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ports {
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@ -143,6 +143,14 @@ hdmi_out_con: endpoint {
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};
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};
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&hdmi_sound {
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status = "okay";
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};
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&i2s0 {
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status = "okay";
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};
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&mmc0 {
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bus-width = <4>;
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cap-mmc-highspeed;
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@ -53,6 +53,22 @@ display-subsystem {
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ports = <&vop0_out>, <&vop1_out>;
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};
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hdmi_sound: hdmi-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "HDMI";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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status = "disabled";
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simple-audio-card,codec {
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sound-dai = <&hdmi>;
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};
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simple-audio-card,cpu {
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sound-dai = <&i2s0>;
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};
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};
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sram: sram@10080000 {
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compatible = "mmio-sram";
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reg = <0x10080000 0x10000>;
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@ -216,6 +216,8 @@ power-domain@RK3128_PD_VIO {
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<&cru ACLK_LCDC0>,
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<&cru HCLK_LCDC0>,
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<&cru PCLK_MIPI>,
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<&cru PCLK_MIPIPHY>,
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<&cru SCLK_MIPI_24M>,
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<&cru ACLK_RGA>,
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<&cru HCLK_RGA>,
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<&cru ACLK_VIO0>,
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@ -275,6 +277,43 @@ vop_out_hdmi: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&hdmi_in_vop>;
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};
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vop_out_dsi: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&dsi_in_vop>;
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};
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};
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};
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dsi: dsi@10110000 {
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compatible = "rockchip,rk3128-mipi-dsi", "snps,dw-mipi-dsi";
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reg = <0x10110000 0x4000>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_MIPI>;
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clock-names = "pclk";
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phys = <&dphy>;
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phy-names = "dphy";
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power-domains = <&power RK3128_PD_VIO>;
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resets = <&cru SRST_VIO_MIPI_DSI>;
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reset-names = "apb";
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rockchip,grf = <&grf>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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dsi_in: port@0 {
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reg = <0>;
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dsi_in_vop: endpoint {
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remote-endpoint = <&vop_out_dsi>;
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};
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};
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dsi_out: port@1 {
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reg = <1>;
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};
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};
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};
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@ -360,6 +399,41 @@ usb_host_ohci: usb@101e0000 {
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status = "disabled";
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};
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i2s_8ch: i2s@10200000 {
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compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s";
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reg = <0x10200000 0x1000>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&pdma 14>, <&pdma 15>;
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dma-names = "tx", "rx";
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif: spdif@10204000 {
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compatible = "rockchip,rk3128-spdif", "rockchip,rk3066-spdif";
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reg = <0x10204000 0x1000>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
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clock-names = "mclk", "hclk";
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dmas = <&pdma 13>;
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dma-names = "tx";
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pinctrl-names = "default";
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pinctrl-0 = <&spdif_tx>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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sfc: spi@1020c000 {
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compatible = "rockchip,sfc";
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reg = <0x1020c000 0x8000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SFC>, <&cru 479>;
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clock-names = "clk_sfc", "hclk_sfc";
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status = "disabled";
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};
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sdmmc: mmc@10214000 {
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compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x10214000 0x4000>;
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@ -408,6 +482,21 @@ emmc: mmc@1021c000 {
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status = "disabled";
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};
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i2s_2ch: i2s@10220000 {
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compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s";
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reg = <0x10220000 0x1000>;
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S_2CH>;
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clock-names = "i2s_clk", "i2s_hclk";
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dmas = <&pdma 0>, <&pdma 1>;
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dma-names = "tx", "rx";
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rockchip,playback-channels = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2s_bus>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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nfc: nand-controller@10500000 {
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compatible = "rockchip,rk3128-nfc", "rockchip,rk2928-nfc";
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reg = <0x10500000 0x4000>;
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@ -477,6 +566,7 @@ hdmi: hdmi@20034000 {
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pinctrl-names = "default";
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pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>;
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power-domains = <&power RK3128_PD_VIO>;
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#sound-dai-cells = <0>;
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status = "disabled";
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ports {
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@ -496,6 +586,18 @@ hdmi_out: port@1 {
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};
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};
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dphy: phy@20038000 {
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compatible = "rockchip,rk3128-dsi-dphy";
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reg = <0x20038000 0x4000>;
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clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>;
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clock-names = "ref", "pclk";
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#phy-cells = <0>;
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power-domains = <&power RK3128_PD_VIO>;
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resets = <&cru SRST_MIPIPHY_P>;
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reset-names = "apb";
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status = "disabled";
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};
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timer0: timer@20044000 {
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compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
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reg = <0x20044000 0x20>;
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@ -1104,6 +1206,32 @@ sdmmc_bus4: sdmmc-bus4 {
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};
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};
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sfc {
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sfc_bus2: sfc-bus2 {
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rockchip,pins = <1 RK_PD0 3 &pcfg_pull_default>,
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<1 RK_PD1 3 &pcfg_pull_default>;
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};
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sfc_bus4: sfc-bus4 {
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rockchip,pins = <1 RK_PD0 3 &pcfg_pull_default>,
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<1 RK_PD1 3 &pcfg_pull_default>,
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<1 RK_PD2 3 &pcfg_pull_default>,
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<1 RK_PD3 3 &pcfg_pull_default>;
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};
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sfc_clk: sfc-clk {
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rockchip,pins = <2 RK_PA4 3 &pcfg_pull_none>;
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};
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sfc_cs0: sfc-cs0 {
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rockchip,pins = <2 RK_PA2 2 &pcfg_pull_default>;
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};
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sfc_cs1: sfc-cs1 {
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rockchip,pins = <2 RK_PA3 2 &pcfg_pull_default>;
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};
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};
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spdif {
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spdif_tx: spdif-tx {
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rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>;
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@ -116,6 +116,7 @@
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#define PCLK_GMAC 367
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#define PCLK_PMU_PRE 368
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#define PCLK_SIM_CARD 369
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#define PCLK_MIPIPHY 370
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/* hclk gates */
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#define HCLK_SPDIF 440
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