From 14a1d1dc35d346a1523f38f6517c349dfa447a58 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 9 May 2024 16:06:48 +0200 Subject: [PATCH 01/10] dt-bindings: clock: rk3128: Add PCLK_MIPIPHY The DPHY's APB clock is required to be exposed in order to be able to enable it and access the phy's registers. Signed-off-by: Alex Bee Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240509140653.168591-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- include/dt-bindings/clock/rk3128-cru.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/clock/rk3128-cru.h b/include/dt-bindings/clock/rk3128-cru.h index 6a47825dac5d..1be455ba4985 100644 --- a/include/dt-bindings/clock/rk3128-cru.h +++ b/include/dt-bindings/clock/rk3128-cru.h @@ -116,6 +116,7 @@ #define PCLK_GMAC 367 #define PCLK_PMU_PRE 368 #define PCLK_SIM_CARD 369 +#define PCLK_MIPIPHY 370 /* hclk gates */ #define HCLK_SPDIF 440 From 65896f4a3f852f868bd5bbc0abea072b2f6e0470 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 9 May 2024 16:06:52 +0200 Subject: [PATCH 02/10] ARM: dts: rockchip: Add D-PHY for RK3128 The InnoSilicon D-PHY found in RK3128 SoCs supports DSI/LVDS/TTL with a maximum transfer rate of 1 Gbps per lane. While adding it, also add it's clocks to RK3128_PD_VIO powerdomain as the phy is part of it. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240509140653.168591-7-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index fb98873fd94e..2e8ab8e8796a 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -216,6 +216,8 @@ power-domain@RK3128_PD_VIO { <&cru ACLK_LCDC0>, <&cru HCLK_LCDC0>, <&cru PCLK_MIPI>, + <&cru PCLK_MIPIPHY>, + <&cru SCLK_MIPI_24M>, <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru ACLK_VIO0>, @@ -496,6 +498,18 @@ hdmi_out: port@1 { }; }; + dphy: phy@20038000 { + compatible = "rockchip,rk3128-dsi-dphy"; + reg = <0x20038000 0x4000>; + clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>; + clock-names = "ref", "pclk"; + #phy-cells = <0>; + power-domains = <&power RK3128_PD_VIO>; + resets = <&cru SRST_MIPIPHY_P>; + reset-names = "apb"; + status = "disabled"; + }; + timer0: timer@20044000 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044000 0x20>; From 171ea1ff14e42041af420ed3745f6f480612baa0 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 9 May 2024 16:06:53 +0200 Subject: [PATCH 03/10] ARM: dts: rockchip: Add DSI for RK3128 Add the Designware MIPI DSI controller and it's port nodes. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240509140653.168591-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 37 ++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 2e8ab8e8796a..a7ab0904564f 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -277,6 +277,43 @@ vop_out_hdmi: endpoint@0 { reg = <0>; remote-endpoint = <&hdmi_in_vop>; }; + + vop_out_dsi: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_vop>; + }; + }; + }; + + dsi: dsi@10110000 { + compatible = "rockchip,rk3128-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0x10110000 0x4000>; + interrupts = ; + clocks = <&cru PCLK_MIPI>; + clock-names = "pclk"; + phys = <&dphy>; + phy-names = "dphy"; + power-domains = <&power RK3128_PD_VIO>; + resets = <&cru SRST_VIO_MIPI_DSI>; + reset-names = "apb"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dsi_in: port@0 { + reg = <0>; + + dsi_in_vop: endpoint { + remote-endpoint = <&vop_out_dsi>; + }; + }; + + dsi_out: port@1 { + reg = <1>; + }; }; }; From f87427158d268fe4747cc223de7a2523617b7475 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 6 May 2024 17:51:02 +0200 Subject: [PATCH 04/10] ARM: dts: rockchip: Add i2s nodes for RK3128 RK3128 SoCs have two i2s controllers. i2s_8ch has 8 tx and 2 rx channels and is internally hard-wired to the hdmi-controller respectivly the SoC's analog codec. i2s_2ch has 2 tx and 2 rx channels and can also be used externally as it's pins are exposed though pinctrl. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240506155103.206592-2-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 27 ++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index a7ab0904564f..2c41a123c96a 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -399,6 +399,18 @@ usb_host_ohci: usb@101e0000 { status = "disabled"; }; + i2s_8ch: i2s@10200000 { + compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s"; + reg = <0x10200000 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>; + clock-names = "i2s_clk", "i2s_hclk"; + dmas = <&pdma 14>, <&pdma 15>; + dma-names = "tx", "rx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + sdmmc: mmc@10214000 { compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -447,6 +459,21 @@ emmc: mmc@1021c000 { status = "disabled"; }; + i2s_2ch: i2s@10220000 { + compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s"; + reg = <0x10220000 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S_2CH>; + clock-names = "i2s_clk", "i2s_hclk"; + dmas = <&pdma 0>, <&pdma 1>; + dma-names = "tx", "rx"; + rockchip,playback-channels = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_bus>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + nfc: nand-controller@10500000 { compatible = "rockchip,rk3128-nfc", "rockchip,rk2928-nfc"; reg = <0x10500000 0x4000>; From d244d6cc718a048672bfb148a6bc9c593a0e1207 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 6 May 2024 17:51:03 +0200 Subject: [PATCH 05/10] ARM: dts: rockchip: Add spdif node for RK3128 The SoC has a S/PDIF TX controller which is fully compatible with older generation Rockchip SoCs. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240506155103.206592-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 2c41a123c96a..4ced1f1fabea 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -411,6 +411,20 @@ i2s_8ch: i2s@10200000 { status = "disabled"; }; + spdif: spdif@10204000 { + compatible = "rockchip,rk3128-spdif", "rockchip,rk3066-spdif"; + reg = <0x10204000 0x1000>; + interrupts = ; + clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>; + clock-names = "mclk", "hclk"; + dmas = <&pdma 13>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + sdmmc: mmc@10214000 { compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; From 041f240e4df6c49d5a928e0dd4c672d0d3326466 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Tue, 18 Jun 2024 14:02:25 +0200 Subject: [PATCH 06/10] ARM: dts: rockchip: add hdmi-sound node to rk3066a Add hdmi-sound node to rk3066a.dtsi, so that it can be reused by boards with HDMI support. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/5fe7c2fe-4a38-436a-8017-66989959329a@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3066a.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3066a.dtsi b/arch/arm/boot/dts/rockchip/rk3066a.dtsi index 30139f21de64..a4e815cd6707 100644 --- a/arch/arm/boot/dts/rockchip/rk3066a.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3066a.dtsi @@ -53,6 +53,22 @@ display-subsystem { ports = <&vop0_out>, <&vop1_out>; }; + hdmi_sound: hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "HDMI"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + status = "disabled"; + + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s0>; + }; + }; + sram: sram@10080000 { compatible = "mmio-sram"; reg = <0x10080000 0x10000>; From 54c799c3c4abe2c5e2c22d47dbcba5c34ec99aae Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 6 Jun 2024 16:34:02 +0200 Subject: [PATCH 07/10] ARM: dts: rockchip: Add SFC for RK3128 Add the Serial Flash Controller and it's pincontrols. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240606143401.32454-7-knaerzche@gmail.com [reference HCLK_SFC by its numeric id to prevent conflicts with the clock binding/controller changes] Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 35 ++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 4ced1f1fabea..5019aae1be32 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -425,6 +425,15 @@ spdif: spdif@10204000 { status = "disabled"; }; + sfc: spi@1020c000 { + compatible = "rockchip,sfc"; + reg = <0x1020c000 0x8000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru 479>; + clock-names = "clk_sfc", "hclk_sfc"; + status = "disabled"; + }; + sdmmc: mmc@10214000 { compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -1196,6 +1205,32 @@ sdmmc_bus4: sdmmc-bus4 { }; }; + sfc { + sfc_bus2: sfc-bus2 { + rockchip,pins = <1 RK_PD0 3 &pcfg_pull_default>, + <1 RK_PD1 3 &pcfg_pull_default>; + }; + + sfc_bus4: sfc-bus4 { + rockchip,pins = <1 RK_PD0 3 &pcfg_pull_default>, + <1 RK_PD1 3 &pcfg_pull_default>, + <1 RK_PD2 3 &pcfg_pull_default>, + <1 RK_PD3 3 &pcfg_pull_default>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = <2 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = <2 RK_PA2 2 &pcfg_pull_default>; + }; + + sfc_cs1: sfc-cs1 { + rockchip,pins = <2 RK_PA3 2 &pcfg_pull_default>; + }; + }; + spdif { spdif_tx: spdif-tx { rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>; From 99a2b6d16b37258bcbdc2e07eb55e129362a182f Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Thu, 20 Jun 2024 16:11:38 +0200 Subject: [PATCH 08/10] ARM: dts: rockchip: enable hdmi_sound and i2s0 for mk808 hdmi Enable the hdmi_sound node and add i2s0 as sound source for mk808 hdmi. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/aa79ff87-ea94-4f6d-a81b-5110724243f4@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3066a-mk808.dts | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts b/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts index 06790f05b395..4de9a45c4883 100644 --- a/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts +++ b/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts @@ -143,6 +143,14 @@ hdmi_out_con: endpoint { }; }; +&hdmi_sound { + status = "okay"; +}; + +&i2s0 { + status = "okay"; +}; + &mmc0 { bus-width = <4>; cap-mmc-highspeed; From d45db4fcd3ae0d13191c8db00583f0bc49d9795d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 24 Jun 2024 19:43:29 +0200 Subject: [PATCH 09/10] ARM: dts: rockchip: add #sound-dai-cells to hdmi node no rk3036 '#sound-dai-cells' is required to properly interpret the list of DAI specified in the 'sound-dai' property, so add them to the 'hdmi' node for 'rk3036.dtsi'. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/55d302e5-c018-4b93-84c1-8cf75162e939@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3036.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/rockchip/rk3036.dtsi index 04af224005f8..96279d1e02fe 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -402,6 +402,7 @@ hdmi: hdmi@20034000 { rockchip,grf = <&grf>; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; + #sound-dai-cells = <0>; status = "disabled"; ports { From 313da6f69fa41d044b03f2ea37e56fe49f1e8a42 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 24 Jun 2024 19:26:48 +0200 Subject: [PATCH 10/10] ARM: dts: rockchip: add #sound-dai-cells to hdmi node on rk3128 '#sound-dai-cells' is required to properly interpret the list of DAI specified in the 'sound-dai' property, so add them to the 'hdmi' node for 'rk3128.dtsi'. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/9d0fabb0-70b0-4b4b-ac7c-389b1c7afe20@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 5019aae1be32..23e633387c24 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -566,6 +566,7 @@ hdmi: hdmi@20034000 { pinctrl-names = "default"; pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>; power-domains = <&power RK3128_PD_VIO>; + #sound-dai-cells = <0>; status = "disabled"; ports {