mirror of
https://github.com/torvalds/linux.git
synced 2026-05-27 16:44:58 +02:00
New peripheral the sdhci controller on rk3528. Enablement of hdmi and hdmi
audio on a number of additional boards. Better handling for scmi shared memory on rk3568 and a fix for the used SCMI clock ids on rk3576. As well as some fixes that were a bit late for trying to stuff them into 6.14 at this late stage of the cycle. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmfVoEwQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgUiYB/9DbZwmkqpkg5l/undLUC2NGKyhadwhCcnW h4112pr1ssUObE6YOtv0nfJWHyr8fHSt//R4CIOkPAuCWseLrxsu5F28tbwNbtCB FtHuLeAoa3cRdnwP0bdAif7Bzz8UfDlqwCYpPnU4p4tuoYx/xZ7CVOUXWuK1uLQ1 Fijj2sknWywRG3u6Z3tNFNJJH1ijvc6Tg1Xlog6Ace+BbOLtwP4z0wdckCj0Hi6N QHxNHP21m1s1W0eGQ6yEaUbnvxjT8n5iupCEqiAshtpiP3jWfhaGNzQ54vvqoLI7 EBIOXTFW760a6QuIVn44vlnSYKMgwu7KZRunl7FvcqJRWtEiAvlh =8a+w -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmfbLX8ACgkQYKtH/8kJ UiepnBAApGrFdlz6Un8RlTQINRt2eej2W8f3U6kJPwr0H8EuohJFyLS1w4akJcB5 Ug+9WWbF6lqFyV/tCVuR1dPxN7haI5Acua2rQ9jUPqH38GqUqMXq6HuEE6R6ML7Q tGsQnAy2vzQj6cVktypas5ZAEdnzauyKaggtgkUrzHsAL1eiy5V/M0qogfxSTpSs uXGixWTdoqUDXfCPVNOFSIa6az8vmZcEvBNdhPH+Zai98UUqf0ULEVPcgtzVV12I yGwPFQPkUsv3RlPx9vmgBIbWyH/C35bufcdkXpiuz8OUgsmx5DoJP8WubwdZUIeW hwXvIHoYNi7MrVu83HVilZzbb/VhbJAvuJPt9Dd1z8LZrxwnS4qMiDDJvgDT5ntn TBGRws/CFbz0GZAB6p2LmT0V7PcmfY/Yg7+NXajkNXHoBwZMclvP7w5sC24Q6Wv/ gHn11gS4FZBjNRO2ymygniRA42PL6/DvNvp+plzw+CR5usRXaNIq65rNWB1YrceG sRWYXTWiewf7iCTpaykkADYvCGkLfz320u+BDIo9G8Y3LSqmPQrfiM/kFqTmS5z+ Lu6B6yt3Oy92tpkKvKqFSVShA5LA2v0YSbrcz5n/lm5VGeDE0KG0CQ4VU89cVFqY T9keWPlmo8SG4LwjOiCJCQHxJEE1vzIt1z8Okv73dhpNYdS1yOE= =5tQQ -----END PGP SIGNATURE----- Merge tag 'v6.15-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New peripheral the sdhci controller on rk3528. Enablement of hdmi and hdmi audio on a number of additional boards. Better handling for scmi shared memory on rk3568 and a fix for the used SCMI clock ids on rk3576. As well as some fixes that were a bit late for trying to stuff them into 6.14 at this late stage of the cycle. * tag 'v6.15-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: remove ethm0_clk0_25m_out from Sige5 gmac0 arm64: dts: rockchip: Fix PWM pinctrl names arm64: dts: rockchip: fix RK3576 SCMI clock IDs dt-bindings: clock: rk3576: add SCMI clocks arm64: dts: rockchip: Fix pcie reset gpio on Orange Pi 5 Max arm64: dts: rockchip: Enable HDMI audio output for ArmSoM Sige7 arm64: dts: rockchip: Enable onboard eMMC on Radxa E20C arm64: dts: rockchip: Add SDHCI controller for RK3528 arm64: dts: rockchip: Remove bluetooth node from rock-3a arm64: dts: rockchip: Move rk356x scmi SHMEM to reserved memory arm64: dts: rockchip: Add AP6275P wireless support to ArmSoM Sige7 arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 Plus arm64: dts: rockchip: Enable HDMI1 on Orange Pi 5 Plus arm64: dts: rockchip: Enable HDMI audio outputs for Orange Pi 5 Max arm64: dts: rockchip: Enable HDMI0 audio output for Orange Pi 5/5B Link: https://lore.kernel.org/r/23866869.6Emhk5qWAg@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
c1abbe602b
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@ -147,7 +147,7 @@ rtc: rtc@51 {
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&pwm5 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm5_pin_pull_down>;
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};
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@ -274,13 +274,13 @@ otg_vbus_drv: otg-vbus-drv {
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&pwm0 {
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pinctrl-0 = <&pwm0_pin_pull_up>;
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pinctrl-names = "active";
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pinctrl-names = "default";
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status = "okay";
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};
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&pwm1 {
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pinctrl-0 = <&pwm1_pin_pull_up>;
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pinctrl-names = "active";
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pinctrl-names = "default";
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status = "okay";
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};
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@ -603,7 +603,7 @@ &pwm1 {
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};
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&pwm2 {
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pinctrl-names = "active";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm2_pin_pull_down>;
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status = "okay";
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};
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@ -15,6 +15,10 @@ / {
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model = "Radxa E20C";
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compatible = "radxa,e20c", "rockchip,rk3528";
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aliases {
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mmc0 = &sdhci;
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};
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chosen {
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stdout-path = "serial0:1500000n8";
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};
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@ -133,6 +137,17 @@ &saradc {
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status = "okay";
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};
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&sdhci {
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bus-width = <8>;
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cap-mmc-highspeed;
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no-sd;
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no-sdio;
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non-removable;
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vmmc-supply = <&vcc_3v3>;
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vqmmc-supply = <&vcc_1v8>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0m0_xfer>;
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@ -468,6 +468,30 @@ saradc: adc@ffae0000 {
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status = "disabled";
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};
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sdhci: mmc@ffbf0000 {
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compatible = "rockchip,rk3528-dwcmshc",
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"rockchip,rk3588-dwcmshc";
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reg = <0x0 0xffbf0000 0x0 0x10000>;
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assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>,
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<&cru CCLK_SRC_EMMC>;
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assigned-clock-rates = <200000000>, <24000000>,
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<200000000>;
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clocks = <&cru CCLK_SRC_EMMC>, <&cru HCLK_EMMC>,
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<&cru ACLK_EMMC>, <&cru BCLK_EMMC>,
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<&cru TCLK_EMMC>;
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clock-names = "core", "bus", "axi", "block", "timer";
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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max-frequency = <200000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>,
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<&emmc_strb>;
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resets = <&cru SRST_C_EMMC>, <&cru SRST_H_EMMC>,
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<&cru SRST_A_EMMC>, <&cru SRST_B_EMMC>,
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<&cru SRST_T_EMMC>;
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reset-names = "core", "bus", "axi", "block", "timer";
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status = "disabled";
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};
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pinctrl: pinctrl {
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compatible = "rockchip,rk3528-pinctrl";
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rockchip,grf = <&ioc_grf>;
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@ -778,20 +778,6 @@ &uart1 {
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pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
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uart-has-rtscts;
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status = "okay";
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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clocks = <&rk809 1>;
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clock-names = "lpo";
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device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
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shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>;
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vbat-supply = <&vcc3v3_sys>;
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vddio-supply = <&vcc_1v8>;
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/* vddio comes from regulator on module, use IO bank voltage instead */
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};
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};
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&uart2 {
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@ -174,6 +174,18 @@ psci {
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method = "smc";
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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scmi_shmem: shmem@10f000 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x0010f000 0x0 0x100>;
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no-map;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
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@ -199,19 +211,6 @@ xin32k: xin32k {
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#clock-cells = <0>;
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};
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sram@10f000 {
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compatible = "mmio-sram";
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reg = <0x0 0x0010f000 0x0 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x0010f000 0x100>;
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scmi_shmem: sram@0 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x100>;
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};
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};
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sata1: sata@fc400000 {
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compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
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reg = <0 0xfc400000 0 0x1000>;
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@ -194,8 +194,7 @@ &gmac0 {
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ð0m0_tx_bus2
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ð0m0_rx_bus2
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ð0m0_rgmii_clk
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ð0m0_rgmii_bus
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ðm0_clk0_25m_out>;
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ð0m0_rgmii_bus>;
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phy-handle = <&rgmii_phy0>;
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status = "okay";
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@ -111,7 +111,7 @@ cpu_l0: cpu@0 {
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reg = <0x0>;
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enable-method = "psci";
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capacity-dmips-mhz = <485>;
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clocks = <&scmi_clk ARMCLK_L>;
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clocks = <&scmi_clk SCMI_ARMCLK_L>;
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operating-points-v2 = <&cluster0_opp_table>;
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#cooling-cells = <2>;
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dynamic-power-coefficient = <120>;
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@ -124,7 +124,7 @@ cpu_l1: cpu@1 {
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reg = <0x1>;
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enable-method = "psci";
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capacity-dmips-mhz = <485>;
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clocks = <&scmi_clk ARMCLK_L>;
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clocks = <&scmi_clk SCMI_ARMCLK_L>;
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operating-points-v2 = <&cluster0_opp_table>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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@ -135,7 +135,7 @@ cpu_l2: cpu@2 {
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reg = <0x2>;
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enable-method = "psci";
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capacity-dmips-mhz = <485>;
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clocks = <&scmi_clk ARMCLK_L>;
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clocks = <&scmi_clk SCMI_ARMCLK_L>;
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operating-points-v2 = <&cluster0_opp_table>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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@ -146,7 +146,7 @@ cpu_l3: cpu@3 {
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reg = <0x3>;
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enable-method = "psci";
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capacity-dmips-mhz = <485>;
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clocks = <&scmi_clk ARMCLK_L>;
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clocks = <&scmi_clk SCMI_ARMCLK_L>;
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operating-points-v2 = <&cluster0_opp_table>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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@ -157,7 +157,7 @@ cpu_b0: cpu@100 {
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reg = <0x100>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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clocks = <&scmi_clk ARMCLK_B>;
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clocks = <&scmi_clk SCMI_ARMCLK_B>;
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operating-points-v2 = <&cluster1_opp_table>;
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#cooling-cells = <2>;
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dynamic-power-coefficient = <320>;
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@ -170,7 +170,7 @@ cpu_b1: cpu@101 {
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reg = <0x101>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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clocks = <&scmi_clk ARMCLK_B>;
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clocks = <&scmi_clk SCMI_ARMCLK_B>;
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operating-points-v2 = <&cluster1_opp_table>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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@ -181,7 +181,7 @@ cpu_b2: cpu@102 {
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reg = <0x102>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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clocks = <&scmi_clk ARMCLK_B>;
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clocks = <&scmi_clk SCMI_ARMCLK_B>;
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operating-points-v2 = <&cluster1_opp_table>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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@ -192,7 +192,7 @@ cpu_b3: cpu@103 {
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reg = <0x103>;
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enable-method = "psci";
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capacity-dmips-mhz = <1024>;
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clocks = <&scmi_clk ARMCLK_B>;
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clocks = <&scmi_clk SCMI_ARMCLK_B>;
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operating-points-v2 = <&cluster1_opp_table>;
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cpu-idle-states = <&CPU_SLEEP>;
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};
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@ -932,7 +932,7 @@ power-domain@RK3576_PD_VO1 {
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gpu: gpu@27800000 {
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compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";
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reg = <0x0 0x27800000 0x0 0x200000>;
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assigned-clocks = <&scmi_clk CLK_GPU>;
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assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
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assigned-clock-rates = <198000000>;
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clocks = <&cru CLK_GPU>;
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clock-names = "core";
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@ -192,6 +192,10 @@ hdmi0_out_con: endpoint {
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};
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};
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&hdmi0_sound {
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status = "okay";
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};
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&hdptxphy0 {
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status = "okay";
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};
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@ -290,6 +294,10 @@ i2s0_8ch_p0_0: endpoint {
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};
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};
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&i2s5_8ch {
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status = "okay";
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};
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/* phy1 - right ethernet port */
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&pcie2x1l0 {
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reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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@ -300,6 +308,22 @@ &pcie2x1l0 {
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&pcie2x1l1 {
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reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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pcie@0,0 {
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reg = <0x300000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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device_type = "pci";
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bus-range = <0x30 0x3f>;
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wifi: wifi@0,0 {
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compatible = "pci14e4,449d";
|
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reg = <0x310000 0 0 0 0>;
|
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clocks = <&hym8563>;
|
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clock-names = "lpo";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* phy0 - left ethernet port */
|
||||
|
|
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|
|
@ -64,7 +64,7 @@ &led_blue_pwm {
|
|||
|
||||
/* phy2 */
|
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&pcie2x1l1 {
|
||||
reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
|
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vpcie3v3-supply = <&vcc3v3_pcie_eth>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -50,6 +50,10 @@ hdmi0_out_con: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
&hdmi0_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd
|
||||
|
|
@ -69,6 +73,10 @@ hdmi1_out_con: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
&hdmi1_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdptxphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -77,6 +85,14 @@ &hdptxphy1 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s5_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s6_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&led_blue_pwm {
|
||||
pwms = <&pwm4 0 25000 0>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -26,6 +26,17 @@ hdmi0_con_in: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
hdmi1-con {
|
||||
compatible = "hdmi-connector";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi1_con_in: endpoint {
|
||||
remote-endpoint = <&hdmi1_out_con>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ir-receiver {
|
||||
compatible = "gpio-ir-receiver";
|
||||
gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -113,6 +124,10 @@ &hdmi0 {
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi0_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi0_in {
|
||||
hdmi0_in_vp0: endpoint {
|
||||
remote-endpoint = <&vp0_out_hdmi0>;
|
||||
|
|
@ -125,10 +140,34 @@ hdmi0_out_con: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
&hdmi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi1_in {
|
||||
hdmi1_in_vp1: endpoint {
|
||||
remote-endpoint = <&vp1_out_hdmi1>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi1_out {
|
||||
hdmi1_out_con: endpoint {
|
||||
remote-endpoint = <&hdmi1_con_in>;
|
||||
};
|
||||
};
|
||||
|
||||
&hdmi1_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdptxphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdptxphy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hym8563 {
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
|
@ -189,6 +228,14 @@ usbc0_sbu: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
&i2s5_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s6_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&led_blue_gpio {
|
||||
gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
|
|
@ -342,3 +389,10 @@ vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
|||
remote-endpoint = <&hdmi0_in_vp0>;
|
||||
};
|
||||
};
|
||||
|
||||
&vp1 {
|
||||
vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 {
|
||||
reg = <ROCKCHIP_VOP2_EP_HDMI1>;
|
||||
remote-endpoint = <&hdmi1_in_vp1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -433,7 +433,7 @@ &pwm2 {
|
|||
};
|
||||
|
||||
&pwm13 {
|
||||
pinctrl-names = "active";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm13m2_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -197,6 +197,10 @@ hdmi0_out_con: endpoint {
|
|||
};
|
||||
};
|
||||
|
||||
&hdmi0_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdptxphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -355,6 +359,10 @@ &i2s1m0_sdi1
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s5_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
|
|
|
|||
|
|
@ -589,4 +589,9 @@
|
|||
#define PCLK_EDP_S 569
|
||||
#define ACLK_KLAD 570
|
||||
|
||||
/* SCMI clocks, use these when changing clocks through SCMI */
|
||||
#define SCMI_ARMCLK_L 10
|
||||
#define SCMI_ARMCLK_B 11
|
||||
#define SCMI_CLK_GPU 456
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user