github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-06-01 19:13:47 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

dt-bindings: net: dsa: lantiq,gswip: add support for MII delay properties

Browse Source 
Add support for standard tx-internal-delay-ps and rx-internal-delay-ps
properties on port nodes to allow fine-tuning of RGMII clock delays.

The GSWIP switch hardware supports delay values in 500 picosecond
increments from 0 to 3500 picoseconds, with a post-reset default of 2000
picoseconds for both TX and RX delays. The driver currently sets the
delay to 0 in case the PHY is setup to carry out the delay by the
corresponding interface modes ("rgmii-id", "rgmii-rxid", "rgmii-txid").

This corresponds to the driver changes that allow adjusting MII delays
using Device Tree properties instead of relying solely on the PHY
interface mode.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/9e007d4f85c2c6d69e0b91f3663d99e0f6fc8eac.1762170107.git.daniel@makrotopia.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Daniel Golle 2025-11-03 12:19:58 +00:00 committed by Jakub Kicinski
parent 319fd7e9d4
commit bea0c17786
1 changed files with 17 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
View File

@ -104,6 +104,20 @@ patternProperties:
description:
Configure the RMII reference clock to be a clock output
rather than an input. Only applicable for RMII mode.
tx-internal-delay-ps:
enum: [0, 500, 1000, 1500, 2000, 2500, 3000, 3500]
description:
RGMII TX Clock Delay defined in pico seconds.
The delay lines adjust the MII clock vs. data timing.
If this property is not present the delay is determined by
the interface mode.
rx-internal-delay-ps:
enum: [0, 500, 1000, 1500, 2000, 2500, 3000, 3500]
description:
RGMII RX Clock Delay defined in pico seconds.
The delay lines adjust the MII clock vs. data timing.
If this property is not present the delay is determined by
the interface mode.
required:
- compatible
@ -127,8 +141,10 @@ examples:
port@0 {
reg = <0>;
label = "lan3";
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
tx-internal-delay-ps = <2000>;
rx-internal-delay-ps = <2000>;
};
port@1 {