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drm/amdgpu: Fix cond_exec handling in amdgpu_ib_schedule()
The EXEC_COUNT field must be > 0. In the gfx shadow
handling we always emit a cond_exec packet after the gfx_shadow
packet, but the EXEC_COUNT never gets patched. This leads
to a hang when we try and reset queues on gfx11 APUs.
Fixes: c68cbbfd54 ("drm/amdgpu: cleanup conditional execution")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4789
Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
637fee3954
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@ -235,7 +235,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
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amdgpu_ring_ib_begin(ring);
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if (ring->funcs->emit_gfx_shadow)
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if (ring->funcs->emit_gfx_shadow && adev->gfx.cp_gfx_shadow)
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amdgpu_ring_emit_gfx_shadow(ring, shadow_va, csa_va, gds_va,
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init_shadow, vmid);
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@ -291,7 +291,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs,
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fence_flags | AMDGPU_FENCE_FLAG_64BIT);
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}
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if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec) {
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if (ring->funcs->emit_gfx_shadow && ring->funcs->init_cond_exec &&
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adev->gfx.cp_gfx_shadow) {
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amdgpu_ring_emit_gfx_shadow(ring, 0, 0, 0, false, 0);
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amdgpu_ring_init_cond_exec(ring, ring->cond_exe_gpu_addr);
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}
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